參數(shù)資料
型號(hào)： RM7065A-400T
英文描述： Microprocessor
中文描述： 微處理器
文件頁數(shù)： 28/52頁
文件大?。?/td> 901K
代理商： RM7065A-400T
Proprietary and Confidential to PMC-Sierra, Inc and for its Customers’ Internal Use
Document ID: PMC-2010145, Issue 3
28
RM7065A Microprocessor with On-Chip Secondary Cache Data Sheet
Released
4.27 Handshake Signals
There are ten handshake signals on the system interface. Two of these,
RdRdy*
and
WrRdy*
, are
driven by an external device to indicate to the RM7065A whether it can accept a new read or write
transaction. The RM7065A samples these signals before deasserting the address on read and write
requests.
ExtRqst*
and
Release*
are used to transfer control of the
SysAD
and
SysCmd
buses from the
processor to an external device. When an external device requires control of the bus, it asserts
ExtRqst*
. The RM7065A responds by asserting
Release*
to release the system interface to slave
state.
PRqst*
and
PAck*
are used to transfer control of the
SysAD
and
SysCmd
buses from the external
agent to the processor. These two pins have been added to the
SysAD
interface to support multiple
outstanding reads and facilitate non-blocking caches. When the processor needs to reacquire
control of the interface, it asserts
PRqst*
. The external device responds by asserting
PAck*
to
return control of the interface to the processor.
RspSwap*
is also a new pin and is used by the external agent to indicate to the processor when it
is returning data out of order. For example, when there are two outstanding reads, the external
agent asserts
RspSwap*
when it is going to return the data for the second read before it returns the
data for the first read.
RdType
is another new pin on the interface that indicates whether a read is an instruction read or a
data read. When asserted, the reference is an instruction read. When deasserted it is a data read.
RdType
is only valid during valid address cycles.
ValidOut*
and
ValidIn*
are used by the RM7065A and the external device respectively to
indicate that there is a valid command or data on the
SysAD
and
SysCmd
buses. The RM7065A
asserts
ValidOut*
when it is driving these buses with a valid command or data, and the external
device drives
ValidIn*
when it has control of the buses and is driving a valid command or data.
4.28 System Interface Operation
To support non-blocking caches and data prefetch instructions, the RM7065A allows two
outstanding reads. An external device may respond to read requests in whatever order it chooses
by using the response order indicator pin
RspSwap*
. No more than two read requests are
submitted to the external device. Support for multiple outstanding reads can be enabled or disabled
via a boot-time mode bit. Refer to Table 16 for a complete list of mode bits.
The RM7065A can issue read and write requests to an external device, while an external device
can issue null and write requests to the RM7065A.
For processor reads, the RM7065A asserts
ValidOut*
and simultaneously drives the address and
read command on the
SysAD
and
SysCmd
buses. If the system interface has
RdRdy*
asserted,
then the processor tristates its drivers and releases the system interface to slave state by asserting
Release*
. The external device can then begin sending data to the RM7065A.
Figure 8 shows a processor block read request and the corresponding external agent read response.
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