參數(shù)資料
型號： S1C63158D0A010P
元件分類： 微控制器/微處理器
英文描述： 4-BIT, FLASH, 4 MHz, MICROCONTROLLER, UUC53
封裝： DIE-53
文件頁數(shù)： 139/159頁
文件大小： 1200K
代理商： S1C63158D0A010P
72
EPSON
S1C63808 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Serial Interface)
4.10 Serial Interface
4.10.1 Configuration of serial interface
The S1C63808 incorporates two channels of full duplex serial interface ports (when asynchronous system
is selected) that allows the user to select either clock synchronous system or asynchronous system.
The data transfer method can be selected in software.
When the clock synchronous system is selected, 8-bit data transfer is possible.
When the asynchronous system is selected, either 7-bit or 8-bit data transfer is possible, and a parity
check of received data and the addition of a parity bit for transmitting data can automatically be done by
selecting in software.
Figure 4.10.1.1 shows the configuration of the serial interface.
fOSC3
Data bus
SOUTx
Serial I/O control
& status register
Received
data buffer
Interrupt
control circuit
Serial input
control circuit
Received data
shift register
Transmitting data
shift register
Serial output
control circuit
SINx
Clock
control circuit
READY output
control circuit
SCLKx
or
SCLKx
Error detection
circuit
SRDYx
or
SRDYx
Start bit
detection circuit
Programmable timer 1 underflow signal
Interrupt
request
OSC3 oscillation circuit
Fig. 4.10.1.1 Configuration of serial interface
Note: Channels 1 and 2 of the serial interface are precisely identical, and the signal and register names
are identified by the channel number (1 or 2) attached (e.g. the SIN1 terminal is for channel 1 and
SIN2 terminal is for channel 2). This section explains the serial interface functions in common to
both channels using common signal names with "x" attached as a substitute for the channel
number (e.g. SIN1/SIN2
→ SINx) except the part that needs distinction.
Serial interface 1 input/output terminals, SIN1, SOUT1, SCLK1 and SRDY1 are shared with the I/O ports
P10–P13. Serial interface 2 input/output terminals, SIN2, SOUT2, SCLK2 and SRDY2 are shared with the I/
O ports P20–P23. In order to utilize these terminals for the serial interface input/output terminals, proper
settings have to be made with registers ESIFx, SMDx0 and SMDx1. (At initial reset, these terminals are set
as I/O port terminals.)
The direction of I/O port terminals set for serial interface input/output terminals are determined by the
signal and transfer mode for each terminal. Furthermore, the settings for the corresponding I/O control
registers for the I/O ports become invalid.
Table 4.10.1.1 Configuration of input/output terminals
Terminal
When serial interface is selected
P10
P11
P12
P13
P20
P21
P22
P23
SIN1
SOUT1
SCLK1
SRDY1
SIN2
SOUT2
SCLK2
SRDY2
* The terminals used may change according to the transfer mode.
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