參數(shù)資料
型號(hào): S1C63158D0A010P
元件分類: 微控制器/微處理器
英文描述: 4-BIT, FLASH, 4 MHz, MICROCONTROLLER, UUC53
封裝: DIE-53
文件頁數(shù): 76/159頁
文件大?。?/td> 1200K
代理商: S1C63158D0A010P
S1C63808 TECHNICAL MANUAL
EPSON
15
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Memory Map)
Address
Comment
D3
D2
Register
D1
D0
Name
Init 1
10
FF06H
FOUTE SWDIR FOFQ1 FOFQ0
R/W
FOUTE
SWDIR
FOFQ1
FOFQ0
0
Enable
Disable
FF05H
00
SVDDT SVDON
RR/W
0 3
SVDDT
SVDON
2
0
Low
On
Normal
Off
Unused
SVD evaluation data
SVD circuit On/Off
FF07H
00
WDEN WDRST
R/W
W
R
0 3
WDEN
WDRST3
2
1
Reset
Enable
Reset
Disable
Invalid
Unused
Watchdog timer enable
Watchdog timer reset (writing)
FF01H
CLKCHG OSCC
0
R/W
R
CLKCHG
OSCC
0 3
0
2
OSC3
On
OSC1
Off
CPU clock switch
OSC3 oscillation On/Off
Unused
FOUT output enable
Stopwatch direct input switch
0: K00=Run/Stop, K01=Lap
1: K00=Lap, K01=Run/Stop
FOUT
frequency
selection
0
fOSC1/64
1
fOSC1/8
2
fOSC1
3
fOSC3
[FOFQ1, 0]
Frequency
FF04H
SVDCHG SVDS2
SVDS1
SVDS0
R/W
SVDCHG
SVDS2
SVDS1
SVDS0
0
3.0 V
1.5 V
SVD voltage system selection
SVD criteria voltage setting
1
1.10
1.80
2
1.15
1.90
3
1.20
2.00
4
1.25
2.10
5
1.30
2.40
6
1.40
2.70
7
1.50
2.90
[SVDS2–0]
1.5 V (V)
3.0 V (V)
0
1.05
1.70
FF1AH
00
STPB2
SDP2
RR/W
0 3
STPB2
SDP2
2
0
2 bits
MSB first
1 bit
LSB first
Unused
Serial I/F 2 stop bit selection
Serial I/F 2 data input/output permutation selection
0
Clk-sync. master
2
Async. 7-bit
1
Clk-sync. slave
3
Async. 8-bit
[SMD21, 20]
Mode
[SMD21, 20]
Mode
FF14H
0
SMD21 SMD20
ESIF2
RR/W
0 3
SMD21
SMD20
ESIF2
2
0
0SIF
I/O
Unused
Serial I/F 2
mode selection
Serial I/F 2 enable (P2x port function selection)
0
fOSC3/16
1
fOSC3/8
2
fOSC3/4
3
PT
[SCS21, 20]
Mode
FF15H
EPR2
PMD2
SCS21
SCS20
R/W
EPR2
PMD2
SCS21
SCS20
0
Enable
Odd
Disable
Even
Serial I/F 2 parity enable register
Serial I/F 2 parity mode selection
Serial I/F 2
clock source
R/W
FF16H
RXTRG2 RXEN2 TXTRG2 TXEN2
RXTRG2
RXEN2
TXTRG2
TXEN2
0
Run
Trigger
Enable
Run
Trigger
Enable
Stop
Disable
Stop
Disable
Serial I/F 2 receive status (reading)
Serial I/F 2 receive trigger (writing)
Serial I/F 2 receive enable
Serial I/F 2 transmit status (reading)
Serial I/F 2 transmit trigger (writing)
Serial I/F 2 transmit enable
RR/W
FF17H
0
FER2
PER2
OER2
0 3
FER2
PER2
OER2
2
0
Error
Reset
Error
Reset
Error
Reset
No error
No error
No error
Unused
Serial I/F 2 framing error flag status (reading)
Serial I/F 2 framing error flag reset (writing)
Serial I/F 2 parity error flag status (reading)
Serial I/F 2 parity error flag reset (writing)
Serial I/F 2 overrun error flag status (reading)
Serial I/F 2 overrun error flag reset (writing)
R/W
FF18H
TRXD23 TRXD22 TRXD21 TRXD20
TRXD23
TRXD22
TRXD21
TRXD20
2
High
Low
Serial I/F 2 t
ransmit/receive data (low-order 4 bits)
LSB
R/W
FF19H
TRXD27 TRXD26 TRXD25 TRXD24
TRXD27
TRXD26
TRXD25
TRXD24
2
High
Low
MSB
Serial I/F 2 t
ransmit/receive data (high-order 4 bits)
FF20H
SIK03
SIK02
SIK01
SIK00
R/W
SIK03
SIK02
SIK01
SIK00
0
Enable
Disable
K00–K03 interrupt selection register
Table 4.1.1 (a) I/O memory map (FF01H–FF20H)
Remarks
1Initial value at initial reset
2 Not set in the circuit
3 Constantly "0" when being read
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