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參數(shù)資料
| 型號： | S1C63158D0A010P |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, FLASH, 4 MHz, MICROCONTROLLER, UUC53 |
| 封裝： | DIE-53 |
| 文件頁數(shù)： | 159/159頁 |
| 文件大?。?/td> | 1200K |
| 代理商： | S1C63158D0A010P |
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S1C63808 TECHNICAL MANUAL
EPSON
91
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Serial Interface)
ESIF1: Serial interface 1 enable register (P1 port function selection) (FF64HD0)
ESIF2: Serial interface 2 enable register (P2 port function selection) (FF14HD0)
Sets P10–P13 and P20–P23 to the input/output ports for the serial interface.
When "1" is written: Serial interface
When "0" is written: I/O port
Reading: Valid
The ESIF1 is the serial interface 1 enable register and P10–P13 terminals become serial input/output
terminals (SIN1, SOUT1, SCLK1, SRDY1) when "1" is written. The ESIF2 is the serial interface 2 enable
register and P20–P23 terminals become serial input/output terminals (SIN2, SOUT2, SCLK2, SRDY2)
when "1" is written. They become I/O port terminals when "0" is written.
Also, see Table 4.10.3.2 for the terminal settings according to the transfer modes.
At initial reset, this register is set to "0".
PUL10: SIN1 pull-down control register (FF45HD0)
PUL20: SIN2 pull-down control register (FF49HD0)
PUL12: SCLK1 pull-down control register (FF45HD2)
PUL22: SCLK2 pull-down control register (FF49HD2)
Sets the pull-down of the SINx terminal and the SCLKx terminals (in the slave mode).
When "1" is written: Pull-down ON
When "0" is written: Pull-down OFF
Reading: Valid
Sets the pull-down resistor built into the SINx (P10/P20) and SCLKx (P12/P22) terminals to ON or OFF.
SCLKx pull-down is effective only in the slave mode. In the master mode, the PUL12/PULL22 register
can be used as a general purpose register.
At initial reset, these registers are set to "1" and the lines are pulled down.
SMD10, SMD11: Serial interface 1 mode selection registers (FF64HD1, D2)
SMD20, SMD21: Serial interface 2 mode selection registers (FF14HD1, D2)
Set the transfer modes as shown in Table 4.10.9.2.
Table 4.10.9.2 Transfer mode settings
SMDx1
SMDx0
Mode
1
0
1
0
1
0
8-bit asynchronous
7-bit asynchronous
Clock synchronous slave
Clock synchronous master
SMDx0 and SMDx1 can also read out.
At initial reset, these registers are set to "0".
SCS10, SCS11: Serial interface 1 clock source selection registers (FF65HD0, D1)
SCS20, SCS21: Serial interface 2 clock source selection registers (FF15HD0, D1)
Select the clock source as shown in Table 4.10.9.3.
Table 4.10.9.3 Clock source selection
SCSx1
1
0
SCSx0
1
0
1
0
Clock source
Programmable timer
fOSC3 / 4
fOSC3 / 8
fOSC3 / 16
SCSx0 and SCSx1 can also be read out.
In the clock synchronous slave mode, setting of these registers are invalid.
At initial reset, these registers are set to "0".
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