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18
Revision 1.1
G
Signal Definitions
(Continued)
Figure 2-2. 388-Terminal Ball Assignment Diagram (Top View)
S
S
S
S
S
S
S
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
AA
AB
AC
AD
AE
AF
Note:
Signal names have been abbreviated in this figure due to space constraints.
= GND Ball
= PWR Ball
= Strap Option Ball
= Multiplexed Ball
S
V
SS
V
IO
CS1#
MD17
MD19
MD21
MD23
MA6
MA8
MA10
DQM3
MD25
MD27
MD29
MD31 SDCK2 SDCK3 SDT2
CKEA
SDT0
NC
GPIO3
NC
GPIO39
V
IO
V
SS
V
IO
V
SS
CS0#
MD16
MD18
MD20
MD22
MD52
MD54
MA9
DQM2
MD24
MD26
MD28
MD30
MD57
MD59
MD61
MD63 GPIO40 GPIO2 TRDE# GPIO17 GPIO37
V
SS
V
IO
RASA# WEA#
V
IO
SDCKO SDCK1 MD49
MD51
MD53
MD55
MA7
BA0
BA1
MA11
DQM6
DQM7
MD56
MD58
MD60
MD62
GXCK
WR#
IOW# ROMCS#
V
IO
GPIO35 GPIO36
SDT1
MA12 CASA# SDCKI
SDT3
MD48
MD50
V
IO
V
SS
V
IO
V
SS
V
CORE
V
SS
V
SS
V
CORE
V
SS
V
IO
V
SS
V
IO
NC
GPIO20 GPIO14
RD#
AD7
GPIO33 GPIO34
MD14
MD15
SDT4 SDCK0
AD8
C/BE0#
AD0
GPIO32
MD12
MD13
MD46
MD47
AD13
AD14
AD2
AD1
MD11
MD45
MD44
V
IO
V
IO
C/BE1#
AD4
AD3
MD10
MD43
MD42
V
SS
V
SS
PAR
AD6
AD5
MD9
MD41
MD40
V
IO
V
IO
PERR#
AD10
AD9
MA2
MD8
MA5
V
SS
V
SS
AD17
AD11
AD12
MA0
MA1
MA4
V
CORE
V
SS
V
CORE
V
SS
V
SS
V
CORE
V
SS
V
CORE
AD20
SERR#
AD15
DQM0
DQM1
MA3
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
AD23
STOP# PCIRST#
MD6
MD7
DQM5 V
CORE
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
CORE
AD26
TRDY# DVSL#
MD4
MD5
DQM4 V
CORE
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
CORE
AD27 FRAME IRDY#
MD3
MD38
MD39
V
SS
V
CORE
V
SS
V
SS
V
SS
V
SS
V
CORE
V
SS
AD30
AD16 C/BE2#
MD2
MD36
MD37
V
CORE
V
SS
SC1100
IA On a Chip
(Top View)
V
CORE
V
SS
V
SS
V
CORE
V
SS
V
CORE
REQ3#
AD19
AD18
MD1
MD34
MD35
V
SS
V
SS
GNT2#
AD22
AD21
MD0
MD32
MD33
V
IO
V
IO
INTD#
AD24 C/BE3#
X32I
X32O
V
BAT
V
SS
V
SS
INTB#
AD28
AD25
AB1C
AB1D
I_AD2
V
IO
V
IO
GPIO19 AD31
AD29
I_CS1# I_CS1# I_AD1
I_AD0
PCICK GPIO41 REQ1# REQ0#
I_DK0# I_RDY0# I_DQ0 I_DAT0
GPIO38 GPIO47 PCICKO GNT0#
I_IOR0#I_IOW0#I_DAT14 I_DAT1 I_DAT7 IRQ14
V
SS
V
IO
V
SS
V
IO
PLL5B GPIO8 V
CORE
V
CORE
GPWIO0
V
SS
V
IO
V
IO
V
SS
TRST# AC_CK BITCK
NC
GPIO18 GNT3# REQ2#
I_DAT13 I_DAT2 I_DAT12 I_DAT3 I_DAT8 I_RST# D+P1
D+P3 AV
SSUSB
FMUL3B
SIN
GPIO6 V
CORE
V
CORE
ONCTL# V
SBL
V
IO
V
IO
PWREN TDO
GTEST SDATO GPIO13 GPIO1 GNT1# INTA#
V
IO
V
SS
I_DAT4 I_DAT5 I_DAT6 I_DAT15 D-P1
D-P3
V
PLL
X27O
SOUT GPIO9 V
CORE
V
CORE
THRM# GPWIO1 PCNT1 GPIO16 OVCUR# TCK
POR#
SYNC GPIO12
NC
V
SS
V
IO
V
SS
V
IO
I_DAT11 I_DAT10 I_DAT9 AV
CCUSB
D+P2
D-P2 AV
SSPLL
X27I
GPIO7 GPIO10 V
CORE
V
CORE
PRBTN#
V
SB
GPIO2 PCNT2 GPIO11
TDI
TMS
SDATI AC_RST# NC
V
IO
V
SS
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
AA
AB
AC
AD
AE
AF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
Geode