Revision 1.1
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G
Core Logic Module
(Continued)
1
GPWIO1 SMI Status.
Indicates whether or not an SMI was caused by a transition on the GPWIO1 pin.
0: No.
1: Yes.
To enable SMI generation:
1) Ensure that GPWIO1 is enabled as an input: F1BAR1+I/O Offset 15h[1] = 0.
2) Set F1BAR1+I/O Offset 15h[5] to 1 to allow SMI generation.
GPWIO0 SMI Status.
Indicates whether or not an SMI was caused by a transition on the GPWIO0 pin.
0: No
1: Yes
To enable SMI generation:
1) Ensure that GPWIO0 is enabled as an input: F1BAR1+I/O Offset 15h[0] = 0.
2) Set F1BAR1+I/O Offset 15h[4] to 1 to allow SMI generation.
0
Index F5h
The bits in this register contain second level status reporting. Top level status is reported in F1BAR0+I/O Offset 00h/02h[0].
Reading this register clears the status at both the second and top levels.
A read-only “Mirror” version of this register exists at F0 Index 85h. If the value of the register must be read without clearing the SMI
source (and consequently deasserting SMI), F0 Index 85h can be read instead.
Second Level PME/SMI Status Register 2 (RC)
Reset Value: 00h
7
6
Reserved.
Reads as 0.
User Defined Device Idle Timer 3 (UDEF3) SMI Status.
Indicates whether or not an SMI was caused by expiration of User
Defined Device 3 (UDEF3) Idle Timer Count Register (F0 Index A4h).
0: No.
1: Yes.
To enable SMI generation, set F0 Index 81h[6] = 1.
User Defined Device Idle Timer 2 (UDEF2) SMI Status.
Indicates whether or not an SMI was caused by expiration of User
Defined Device 2 (UDEF2) Idle Timer Count Register (F0 Index A2h).
0: No.
1: Yes.
To enable SMI generation, set F0 Index 81h[5] = 1.
User Defined Device Idle Timer 1 (UDEF1) SMI Status.
Indicates whether or not an SMI was caused by expiration of User
Defined Device 1 (UDEF1) Idle Timer Count Register (F0 Index A0h).
0: No.
1: Yes.
To enable SMI generation, set F0 Index 81h[4] = 1.
Keyboard/Mouse Idle Timer SMI Status.
Indicates whether or not an SMI was caused by expiration of Keyboard/ Mouse
Idle Timer Count Register (F0 Index 9Eh).
0: No.
1: Yes.
To enable SMI generation, set F0 Index 81h[3] = 1.
Parallel/Serial Idle Timer SMI Status.
Indicates whether or not an SMI was caused by expiration of Parallel/Serial Port Idle
Timer Count Register (F0 Index 9Ch).
0: No.
1: Yes.
To enable SMI generation, set F0 Index 81h[2] = 1.
Floppy Disk Idle Timer SMI Status.
Indicates whether or not an SMI was caused by expiration of Floppy Disk Idle Timer
Count Register (F0 Index 9Ah).
0: No.
1: Yes.
To enable SMI generation, set F0 Index 81h[1] = 1.
5
4
3
2
1
Table 5-29. F0: PCI Header and Bridge Configuration Registers for GPIO and LPC Support (Continued)
Bit
Description