參數(shù)資料
型號(hào): SI3225PPTX-EVB
廠商: Silicon Laboratories Inc
文件頁(yè)數(shù): 45/112頁(yè)
文件大?。?/td> 0K
描述: BOARD EVAL W/DISCRETE INTERFACE
設(shè)計(jì)資源: Si3225PPTX-EVB Schematics/Layout
標(biāo)準(zhǔn)包裝: 1
系列: ProSLIC®
主要目的: 接口,模擬前端(AFE)
已用 IC / 零件: Si3225
已供物品: 板,CD
Si3220/25 Si3200/02
38
Rev. 1.3
Not
Recommended
fo
r N
ew
D
esi
gn
s
Figure 18. Discrete Linefeed Circuit for Power Monitoring
Table 21. Register and RAM Locations Used for Loop Monitoring
Parameter
Register/RAM
Mnemonic
Register/RAM
Bits
Measurement
Range
LSB Size
Effective
Resolution
Loop Voltage Sense
(VTIP –VRING)
VLOOP
VLOOP[15:0]
0 to 64.07 V
64.07 to 160.173 V
4.907 mV
251 mV
628 mV
TIP Voltage Sense
VTIP
VTIP[15:0]
0 to 64.07 V
64.07 to 160.173 V
4.907 mV
251 mV
628 mV
RING Voltage Sense
VRING
VRING[15:0]
0 to 64.07 V
64.07 to 160.173 V
4.907 mV
251 mV
628 mV
Loop Current Sense
ILOOP
ILOOP[15:0]
0 to 101.09 mA
3.097 A
500
A*
Battery Voltage Sense
VBAT
VBAT[15:0]
0 to 63.3 V
0 to 160.173 V
4.907 mV
251 mV
628 mV
Longitudinal Current
Sense
ILONG
ILONG[15:0]
0 to 101.09 mA
3.097 A
500 A*
External Ringing Gen-
erator Voltage Sense
VRNGNG
VRNGNG[15:0]
332.04 V
10.172 mV
1.302 V
External Ringing Gen-
erator Current Sense
IRNGNG
IRNGNG[15:0]
662.83 mA
20.3 A
2.6 mA
*Note: ILOOP and ILONG are calculated values based on measured IQ1–IQ4 currents. The resulting effective resolution is
approximately 500 A.
Q2
Q5
R7
IRINGP
Q9
R7*gain
IRINGN
Q3
RING
Q1
Q6
R6
ITIPP
Q10
R6*gain
ITIPN
Q4
TIP
VBAT
RBQ6
RBQ5
Q8
Q7
82.5
1.74k
82.5
1.74k
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