參數(shù)資料
型號(hào)： T8105A
英文描述： H.100/H.110 Interface and Time-Slot Interchangers
中文描述： H.100/H.110接口和時(shí)隙Interchangers
文件頁(yè)數(shù)： 61/112頁(yè)
文件大?。?/td> 1408K
代理商： T8105A
Lucent Technologies Inc.
57
Advance Data Sheet
November 1999
H.100/H.110 Interfaces and Time-Slot Interchangers
Ambassador T8100A, T8102, and T8105
2 Architecture and Functional Description
(continued)
2.5 Clocking Section
(continued)
2.5.9 LREF Pairing
The Ambassadordevices have a feature which is programmable by software called LREF pairing (a pair of pins).
This means that a pair of synchronizing clocks (a bit clock and a frame clock) can be input through the LREF port,
and the T810X will phase-lock and derive all of its timing from them. LREF pairing can be considered as an exten-
sion to the CT_C8A, CT_C8B, and CT_FRAME_A, CT_FRAME_B pairs of clocks. When this option is selected,
the onboard DPLL is bypassed and the LREF frame input becomes the internal frame synchronization clock. The
LREF bit clock is routed to the dividers and finally to the analog PLL.
2.5.9.1 LREF Port Configuration
When LREF pairing is enabled (CON register, bit 4 = 1), the LREF port is configured as described in Table 53. The
pairs must be used as listed in the table (they cannot be mixed and/or matched). In addition to the enable/disable
control bit, the CON register has 2 additional control bits for inverting the frame strobe and bit clock.
Table 53. LREF Pairs
Table 54. CKM (0x00) CKSEL Values to Select LREF Pairs
To use LREF pairing, the bits 3:0 (CKSEL) in the CKM register must be programmed to one of the following values
to select one of the LREF pairs as the input.
Notes:
1. If the CKSEL value is LREF4—LREF7 (0x1100—0x1111) as the input source, LREF pairing will not function.
2. CKSEL must be programmed to select LREF0—LREF3 in order to have LREF pairing.
3. Each LREF pair must be phase-locked together. Otherwise, the device timing will function incorrectly, causing unpredictable results.
Input Pins
LREF0
LREF4
LREF1
LREF5
LREF2
LREF6
LREF3
LREF7
Description
Bit clock
Frame synchronization clock
Bit clock
Frame synchronization clock
Bit clock
Frame synchronization clock
Bit clock
Frame synchronization clock
Symbol
CKSEL
Bit
3—0
Description
CKSEL = 1000, sets LREF0 as bit clock input and
sets LREF4 as frame sync input.
CKSEL = 1001, sets LREF1 as bit clock input and
sets LREF5 as frame sync input.
CKSEL = 1010, sets LREF2 as bit clock input and
sets LREF6 as frame sync input.
CKSEL = 1011, sets LREF3 as bit clock input and
sets LREF7 as frame sync input.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
T810-600B 功能描述:雙向可控硅 8A TRIACS RoHS:否 制造商:STMicroelectronics 開(kāi)啟狀態(tài) RMS 電流 (It RMS):16 A 不重復(fù)通態(tài)電流:120 A 額定重復(fù)關(guān)閉狀態(tài)電壓 VDRM:600 V 關(guān)閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開(kāi)啟狀態(tài)電壓: 保持電流（Ih 最大值）:45 mA 柵觸發(fā)電壓 (Vgt):1.3 V 柵觸發(fā)電流 (Igt):1.75 mA 最大工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-220AB
T810-600B 制造商:STMicroelectronics 功能描述:TRIAC 8A 600V D-PAK
T810-600B-TR 功能描述:雙向可控硅 8A TRIACS RoHS:否 制造商:STMicroelectronics 開(kāi)啟狀態(tài) RMS 電流 (It RMS):16 A 不重復(fù)通態(tài)電流:120 A 額定重復(fù)關(guān)閉狀態(tài)電壓 VDRM:600 V 關(guān)閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開(kāi)啟狀態(tài)電壓: 保持電流（Ih 最大值）:45 mA 柵觸發(fā)電壓 (Vgt):1.3 V 柵觸發(fā)電流 (Igt):1.75 mA 最大工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-220AB
T810-600G 功能描述:雙向可控硅 8A TRIACS RoHS:否 制造商:STMicroelectronics 開(kāi)啟狀態(tài) RMS 電流 (It RMS):16 A 不重復(fù)通態(tài)電流:120 A 額定重復(fù)關(guān)閉狀態(tài)電壓 VDRM:600 V 關(guān)閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開(kāi)啟狀態(tài)電壓: 保持電流（Ih 最大值）:45 mA 柵觸發(fā)電壓 (Vgt):1.3 V 柵觸發(fā)電流 (Igt):1.75 mA 最大工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-220AB
T810-600G-TR 功能描述:雙向可控硅 8.0 Amp 600 Volt RoHS:否 制造商:STMicroelectronics 開(kāi)啟狀態(tài) RMS 電流 (It RMS):16 A 不重復(fù)通態(tài)電流:120 A 額定重復(fù)關(guān)閉狀態(tài)電壓 VDRM:600 V 關(guān)閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開(kāi)啟狀態(tài)電壓: 保持電流（Ih 最大值）:45 mA 柵觸發(fā)電壓 (Vgt):1.3 V 柵觸發(fā)電流 (Igt):1.75 mA 最大工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-220AB
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