參數(shù)資料
型號: T8105A
英文描述: H.100/H.110 Interface and Time-Slot Interchangers
中文描述: H.100/H.110接口和時隙Interchangers
文件頁數(shù): 88/112頁
文件大?。?/td> 1408K
代理商: T8105A
84
Lucent Technologies Inc.
Advance Data Sheet
November 1999
H.100/H.110 Interfaces and Time-Slot Interchangers
Ambassador T8100A, T8102, and T8105
4 Electrical Characteristics
(continued)
4.6 dc Electrical Characteristics, H-Bus (ECTF H.100 Spec., Rev. 1.0)
4.6.1 Electrical Drive Specifications—CT_C8 and /CT_FRAME
Table 74. Electrical Drive Specifications—CT_C8 and /CT_FRAME
V
DD
= 3.3 V and V
SS
= 0.0 V unless otherwise specified.
PCI-compliant data line I/O cells are used for the CT bus data lines. (See PCI Specification, Rev. 2.1, Chapter 4.)
/C16, /C4, C2, SCLK, SCLKX2, and /FR_COMP all use the same driver/receiver pairs as those specified for the
CT_C8 and /CT_FRAME signals, though this is not explicitly stated as a part of the H.100 Specification.
4.7 dc Electrical Characteristics, All Other Pins
Table 75. dc Electrical Characteristics, All Other Pins
V
DD
= 3.3 V and V
SS
= 0.0 V unless otherwise specified.
* Circuit simulation indicates a typical current of 175 mA and a worst-case current of 275 mA. This parameter is not tested in production.
Parameter
Symbol
V
OH
V
OL
Vt+
Vt–
V
HYS
C
IN
Condition
I
OUT
= –24 mA
I
OUT
= 24 mA
Min
2.4
–0.25
1.2
0.6
0.4
Max
3.3
0.4
2.0
1.6
10
Unit
V
V
V
V
V
pF
Output High Voltage
Output Low Voltage
Positive-going Threshold
Negative-going Threshold
Hysteresis (Vt+ – Vt–)
Input Pin Capacitance
Description
Symbol
I
DD
V
DD
V
IH
V
IL
I
I
C
I
C
IO
I
LEAK
V
C
V
OH
V
OL
I
OS
Condition
V
OH
tied to GND
Min
3.0
2.0
2.4
Typ
175*
Max
275*
3.6
0.8
1
5
10
10
–1.0
0.4
100
Unit
mA
V
V
V
μA
pF
pF
μA
V
V
V
mA
Supply Current
Supply Voltage
Input High Voltage
Input Low Voltage
Input Current
Input Capacitance (input only)
Input Capacitance (I/O pins)
Leakage Current (3-state)
Input Clamp Voltage
Output High Voltage
Output Low Voltage
Output Short-circuit Current
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