參數(shù)資料
型號(hào): T8105A
英文描述: H.100/H.110 Interface and Time-Slot Interchangers
中文描述: H.100/H.110接口和時(shí)隙Interchangers
文件頁數(shù): 63/112頁
文件大小: 1408K
代理商: T8105A
Lucent Technologies Inc.
59
Advance Data Sheet
November 1999
H.100/H.110 Interfaces and Time-Slot Interchangers
Ambassador T8100A, T8102, and T8105
2 Architecture and Functional Description
(continued)
2.6 Interface Section
(continued)
2.6.3 Framing Groups
The framing group signals are another feature of the T8100A/02/05 devices. With the 11-bit offset, the start of the
first frame pulse can be positioned anywhere within the frame: therefore, simply defining the start of a virtual frame.
Since there are 12 signals for each group and there are two groups, the user has great flexibility when interfacing to
other telephony cards.
Two groups of frame pulses are available. Each frame group consists of 12 lines which are enabled sequentially
after a programmed starting point. They are denoted as group A and group B. This section describes framing
group A. Framing group B is made up of similar registers. Each frame group is controlled by a pair of registers:
FRHA and FRLA control the spacing of the 12 frame pulses, their pulse width, polarity, and the offset of the first
pulse from the frame boundary.
Table 55. FRHA, Frame Group A High Address and Control, 0x21
Table 56. FRHB, Frame Group B High Address and Control, 0x23
Reg
FRHA
R/W
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
FAI
Bit 2
Bit 1
Hi Start
Bit 0
Rate
Type
Symbol
Rate
Bit
7—6
Description
Rate
Rate
Rate
Rate
Type
Type
Type
Type
FAI
FAI
Hi Start =
=
=
=
=
=
=
=
=
=
=
00,
01,
10,
11,
00,
01,
10,
11,
0,
1,
Upper 3 bits of group start address or programmed output.
Frame group disabled, 3-state.
2.048 Mbits/s.
4.096 Mbits/s.
8.192 Mbits/s.
Bit-wide pulse.
Double bit-wide pulse.
Byte-wide pulse.
Double byte-wide pulse.
Normal pulse.
Inverted pulse.
Type
5—4
FAI
3
Hi Start
2—0
Reg
FRHB
R/W
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
FAI
Bit 2
Bit 1
Hi Start
Bit 0
Rate
Type
Symbol
Rate
Bit
7—6
Description
Rate
Rate
Rate
Rate
Type
Type
Type
Type
FAI
FAI
Hi Start =
=
=
=
=
=
=
=
=
=
=
00,
01,
10,
11,
00,
01,
10,
11,
0,
1,
Upper 3 bits of group start address.
Frame group disabled, 3-state.
2.048 Mbits/s.
4.096 Mbits/s.
8.192 Mbits/s.
Bit-wide pulse.
Double bit-wide pulse.
Byte-wide pulse.
Double byte-wide pulse.
Normal pulse.
Inverted pulse.
Type
5—4
FAI
3
Hi Start
2—0
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