參數(shù)資料
型號: THS8200PFPG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP80
封裝: GREEN, PLASTIC, HTQFP-80
文件頁數(shù): 75/101頁
文件大?。?/td> 806K
代理商: THS8200PFPG4
5–18
LINE TYPE
dtg1_linetype <n>(3:0)
0000
ACTIVE_VIDEO
0001
FULL_NTS
0010
FULL_BTSP
0011
NTSP_NTSP
0100
BTSP_BTSP
0101
NTSP_BTSP
0110
BTSP_NTSP
0111
ACTIVE_NEQ
1000
NSP_ACTIVE
1001
FULL_NSP
1010
FULL_BSP
1011
FULL_NEQ
1100
NEQ_NEQ
1101
BSP_BSP
1110
BSP_NEQ
1111
NEQ_BSP
dtg2_hlength(9:0):
HS_OUT duration
{dtg2_hlength_lsb_hdly_msb 0x71(7:6) and dtg2_hlength_lsb 0x70(7:0)}
[00 0110 0000]
Sets the duration of the HS_OUT output signal.
dtg2_hdly(12:0):
HS_OUT delay
{dtg2_hlength_lsb_hdly_msb 0x71(4:0) and dtg2_hdly_lsb 0x72(7:0)}
[0 0000 0000 0010]
Sets the pixel value that the HS_OUT signal is asserted on. Note: when programmed to a value higher than the total
number of pixels per line, there will be no HS_OUT output.
dtg2_vlength1(9:0):
VS_OUT duration, field 1
{dtg2_vlength1_msb_vdly1_msb 0x74(7:6) and dtg2_vlength1_lsb 0x73(7:0)}
[00 0000 0011]
Sets the duration of the VS_OUT output signal during progressive scan video modes or during the vertical blank
interval of field 1 in interlaced video modes.
dtg2_vdly1(10:0):
VS_OUT delay, field 1
{dtg2_vlength1_msb_vdly1_msb 0x74(2:0) and dtg2_vdly1_lsb 0x75(7:0)}
[000 0000 0011]
Sets the line number that the VS_OUT signal is asserted on for progressive video modes or for field 1 of interlaced
video modes. Note: when programmed to a value higher than the total number of lines per frame, there is no
VS_OUT output.
dtg2_vlength2(9:0):
VS_OUT duration, field 2
{dtg2_vlength2_msb_vdly2_msb 0x77(7:6) and dtg2_vlength2_lsb 0x76(7:0)}
[00 0000 0000]
Sets the duration of the VS_OUT output signal during the vertical blank interval of field 2 in interlaced video modes.
In progressive video modes, this register must be set to all 0.
dtg2_vdly2(10:0):
VS_OUT delay, field 2
{dtg2_vlength2_msb_vdly2_msb 0x77(2:0) and dtg2_vdly2_lsb 0x78(7:0)}
[111 1111 1111]
Sets the line number that the VS_OUT signal is asserted on for field 2 of interlaced scan video modes. For
progressive scan video modes, this register must be set to all 1.
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