7–2
7.3
Electrical Characteristics Over Recommended Operating Conditions With
fCLK = 205 MHz and RFS = RFS(nom) (Unless Otherwise Noted)
7.3.1
Power Supply, 1-MHz FS Ramp Simultaneously Applied to All Three Channels
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
AVDD = 3.3 V, DVDD = 1.8 V,
Video + no bias (700 mV)
94
98
AVDD = 3.3 V, DVDD = 1.8 V,
VDD_DLL = 1.8 V, VDD_IO = 3.3 V,
Video + bias (1.05 V)
94
98
IAV
Operating analog
VDD_DLL
1.8 V, VDD_IO
3.3 V,
CLK = 80 MHz
Generic + no bias (1.25 V)
162
170
mA
IAVDD
O erating analog
supply current
AVDD = 3.3 V, DVDD = 1.8 V,
Video + no bias (700 mV)
94
98
mA
y
AVDD = 3.3 V, DVDD = 1.8 V,
VDD_DLL = 1.8 V (DLL bypassed),
Video + bias (1.05 V)
94
98
VDD_DLL
1.8 V (DLL by assed),
VDD_IO = 1.8 V, CLK = 200 MHz
Generic + no bias (1.25 V)
162
170
AVDD = 3.3 V, DVDD = 1.8 V,
Video + no bias (700 mV)
38
45
AVDD = 3.3 V, DVDD = 1.8 V,
VDD_IO = 3.3 V, VDD_DLL = 1.8 V,
Video + bias (1.05 V)
38
45
IDV
Operating digital
VDD_IO
3.3 V, VDD_DLL
1.8 V,
CLK = 80 MHz
Generic + no bias (1.25 V)
38
45
mA
IDVDD
O erating digital
supply current
AVDD =3 3V DVDD =1 8V
Video + no bias (700 mV)
89
95
mA
y
AVDD = 3.3 V, DVDD = 1.8 V,
VDD_DLL = 1.8 V (DLL bypassed),
VDD IO
1 8 V CLK
200 MH
Video + bias (1.05 V)
89
95
_
8
(
by assed),
VDD_IO = 1.8 V, CLK = 200 MHz
Generic + no bias (1.25 V)
89
95
AVDD = 3.3 V, DVDD = 1.8 V,
Video + no bias (700 mV)
1.7
2.2
AVDD = 3.3 V, DVDD = 1.8 V,
VDD_IO = 3.3 V, VDD_DLL = 1.8 V,
Video + bias (1.05 V)
1.7
2.2
IVDD IO
Operating IO
VDD_IO
3.3 V, VDD_DLL
1.8 V,
CLK = 80 MHz
Generic + no bias (1.25 V)
1.7
2.2
mA
IVDD_IO
O erating IO
supply current
AVDD = 3.3 V, DVDD = 1.8 V,
Video + no bias (700 mV)
1.7
2.2
mA
y
AVDD = 3.3 V, DVDD = 1.8 V,
VDD_DLL = 1.8 V (DLL bypassed),
Video + bias (1.05 V)
1.7
2.2
VDD_DLL
1.8 V (DLL by assed),
VDD_IO = 1.8 V, CLK = 200 MHz
Generic + no bias (1.25 V)
1.7
2.2
AVDD = 3.3 V, DVDD = 1.8 V,
Video + no bias (700 mV)
4.9
5.6
AVDD = 3.3 V, DVDD = 1.8 V,
VDD_IO = 3.3 V, VDD_DLL = 1.8 V,
Video + bias (1.05 V)
4.9
5.6
IVDD DLL
Operating DLL
VDD_IO
3.3 V, VDD_DLL
1.8 V,
CLK = 80 MHz
Generic + no bias (1.25 V)
4.9
5.6
mA
IVDD_DLL
O erating DLL
supply current
AVDD = 3.3 V, DVDD = 1.8 V,
Video + no bias (700 mV)
4.9
5.6
mA
y
AVDD = 3.3 V, DVDD = 1.8 V,
VDD_DLL = 1.8 V (DLL bypassed),
Video + bias (1.05 V)
4.9
5.6
VDD_DLL
1.8 V (DLL by assed),
VDD_IO = 1.8 V, CLK = 200 MHz
Generic + no bias (1.25 V)
4.9
5.6
AVDD = 3.3 V, DVDD = 1.8 V,
Video + no bias (700 mV)
398
430
AVDD = 3.3 V, DVDD = 1.8 V,
VDD_IO = 3.3 V, VDD_DLL = 1.8 V,
Video + bias (1.05 V)
398
430
P
Power dissipation
VDD_IO
3.3 V, VDD_DLL
1.8 V,
CLK = 80 MHz
Generic + no bias (1.25 V)
641
660
mW
PD
Power dissipation
AVDD = 3.3 V, DVDD = 1.8 V,
Video + no bias (700 mV)
489
500
mW
AVDD = 3.3 V, DVDD = 1.8 V,
VDD_DLL = 1.8 V (DLL bypassed),
Video + bias (1.05 V)
489
500
VDD_DLL
1.8 V (DLL by assed),
VDD_IO = 1.8 V, CLK = 200 MHz
Generic + no bias (1.25 V)
700
735