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Tables
14
July 2002 Revised March 2004
SPRS200E
Table
Page
41
Board-Level Timing Example
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51
Timing Requirements for CLKIN for 500 Devices
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52
Timing Requirements for CLKIN for 600 Devices
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53
Switching Characteristics Over Recommended Operating Conditions for CLKOUT4
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54
Switching Characteristics Over Recommended Operating Conditions for CLKOUT6)
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55
Timing Requirements for AECLKIN for EMIFA
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56
Switching Characteristics Over Recommended Operating Conditions for AECLKOUT1 for the
EMIFA Module
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57
Switching Characteristics Over Recommended Operating Conditions for AECLKOUT2 for the
EMIFA Module
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58
Timing Requirements for Asynchronous Memory Cycles for EMIFA Module
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59
Switching Characteristics Over Recommended Operating Conditions for Asynchronous Memory
Cycles for EMIFA Module
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510
Timing Requirements for Programmable Synchronous Interface Cycles for EMIFA Module
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511
Switching Characteristics Over Recommended Operating Conditions for Programmable
Synchronous Interface Cycles for EMIFA Module
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512
Timing Requirements for Synchronous DRAM Cycles for EMIFA Module
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513
Switching Characteristics Over Recommended Operating Conditions for Synchronous DRAM
Cycles for EMIFA Module
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514
Timing Requirements for the HOLD/HOLDA Cycles for EMIFA Module
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515
Switching Characteristics Over Recommended Operating Conditions for the HOLD/HOLDA
Cycles for EMIFA Module
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516
Switching Characteristics Over Recommended Operating Conditions for the BUSREQ Cycles
for EMIFA Module
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517
Timing Requirements for Reset
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518
Switching Characteristics Over Recommended Operating Conditions During Reset
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519
Timing Requirements for External Interrupts
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520
Timing Requirements for McASP
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521
Switching Characteristics Over Recommended Operating Conditions for McASP
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522
Timing Requirements for I2C Timings
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523
Switching Characteristics for I2C Timings
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524
Timing Requirements for Host-Port Interface Cycles
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525
Switching Characteristics Over Recommended Operating Conditions During Host-Port
Interface Cycles
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526
Timing Requirements for PCLK
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527
Timing Requirements for PCI Reset
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528
Timing Requirements for PCI Inputs
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529
Switching Characteristics Over Recommended Operating Conditions for PCI Outputs
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530
Timing Requirements for Serial EEPROM Interface
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531
Switching Characteristics Over Recommended Operating Conditions for Serial EEPROM
Interface
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532
Timing Requirements for McBSP
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533
Switching Characteristics Over Recommended Operating Conditions for McBSP
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534
Timing Requirements for FSR When GSYNC = 1
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535
Timing Requirements for McBSP as SPI Master or Slave: CLKSTP = 10b, CLKXP = 0
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536
Switching Characteristics Over Recommended Operating Conditions for McBSP as SPI Master or
Slave: CLKSTP = 10b, CLKXP = 0
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