- 您現(xiàn)在的位置：買賣IC網 > PDF目錄300038 > TMX320DM642GNZ500 (TEXAS INSTRUMENTS INC) 64-BIT, 75.19 MHz, OTHER DSP, PBGA548 PDF資料下載
參數(shù)資料
| 型號： | TMX320DM642GNZ500 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 64-BIT, 75.19 MHz, OTHER DSP, PBGA548 |
| 封裝： | 27 X 27 MM, 1 MM PITCH, PLASTIC, BGA-548 |
| 文件頁數(shù)： | 93/181頁 |
| 文件大?。?/td> | 2291K |
| 代理商： | TMX320DM642GNZ500 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁當前第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁
Description
19
July 2002 Revised March 2004
SPRS200E
1.3
Description
The TMS320C64x
DSPs (including the TMS320DM642 device) are the highest-performance fixed-point
DSP generation in the TMS320C6000
DSP platform. The TMS320DM642 (DM642) device is based on the
second-generation high-performance, advanced VelociTI
very-long-instruction-word (VLIW) architecture
(VelociTI.2
) developed by Texas Instruments (TI), making these DSPs an excellent choice for digital media
applications. The C64x
is a code-compatible member of the C6000 DSP platform.
With performance of up to 4800 million instructions per second (MIPS) at a clock rate of 600 MHz, the DM642
device offers cost-effective solutions to high-performance DSP programming challenges. The DM642 DSP
possesses the operational flexibility of high-speed controllers and the numerical capability of array
processors. The C64x
DSP core processor has 64 general-purpose registers of 32-bit word length and eight
highly independent functional units—two multipliers for a 32-bit result and six arithmetic logic units (ALUs)—
with VelociTI.2
extensions. The VelociTI.2 extensions in the eight functional units include new instructions
to accelerate the performance in video and imaging applications and extend the parallelism of the VelociTI
architecture. The DM642 can produce four 32-bit multiply-accumulates (MACs) per cycle for a total of
2400 million MACs per second (MMACS), or eight 8-bit MACs per cycle for a total of 4800 MMACS. The
DM642 DSP also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals
similar to the other C6000
DSP platform devices.
The DM642 uses a two-level cache-based architecture and has a powerful and diverse set of peripherals. The
Level 1 program cache (L1P) is a 128-Kbit direct mapped cache and the Level 1 data cache (L1D) is a 128-Kbit
2-way set-associative cache. The Level 2 memory/cache (L2) consists of an 2-Mbit memory space that is
shared between program and data space. L2 memory can be configured as mapped memory, cache, or
combinations of the two. The peripheral set includes: three configurable video ports; a 10/100 Mb/s Ethernet
MAC (EMAC); a management data input/output (MDIO) module; a VCXO interpolated control port (VIC); one
multichannel buffered audio serial port (McASP0); an inter-integrated circuit (I2C) Bus module; two
multichannel buffered serial ports (McBSPs); three 32-bit general-purpose timers; a user-configurable 16-bit
or 32-bit host-port interface (HPI16/HPI32); a peripheral component interconnect (PCI); a 16-pin
general-purpose input/output port (GP0) with programmable interrupt/event generation modes; and a 64-bit
glueless external memory interface (EMIFA), which is capable of interfacing to synchronous and
asynchronous memories and peripherals.
The DM642 device has three configurable video port peripherals (VP0, VP1, and VP2). These video port
peripherals provide a glueless interface to common video decoder and encoder devices. The DM642 video
port peripherals support multiple resolutions and video standards (e.g., CCIR601, ITUBT.656, BT.1120,
SMPTE 125M, 260M, 274M, and 296M).
These three video port peripherals are configurable and can support either video capture and/or video display
modes. Each video port consists of two channels — A and B with a 5120-byte capture/display buffer that is
splittable between the two channels.
For more details on the Video Port peripherals, see the TMS320C64x DSP Video Port/VCXO Interpolated
Control (VIC) Port Reference Guide (literature number SPRU629).
The McASP0 port supports one transmit and one receive clock zone, with eight serial data pins which can be
individually allocated to any of the two zones. The serial port supports time-division multiplexing on each pin
from 2 to 32 time slots. The DM642 has sufficient bandwidth to support all 8 serial data pins transmitting a
192-kHz stereo signal. Serial data in each zone may be transmitted and received on multiple serial data pins
simultaneously and formatted in a multitude of variations on the Philips Inter-IC Sound (I2S) format.
In addition, the McASP0 transmitter may be programmed to output multiple S/PDIF, IEC60958, AES-3,
CP-430 encoded data channels simultaneously, with a single RAM containing the full implementation of user
data and channel status fields.
McASP0 also provides extensive error-checking and recovery features, such as the bad clock detection circuit
for each high-frequency master clock which verifies that the master clock is within a programmed frequency
range.
ADV
ANCE
INFORMA
TION
TMS320C6000, and C6000 are trademarks of Texas Instruments.
相關PDF資料 |
PDF描述 |
|---|---|
| TN4002PM | 10 MHz - 500 MHz RF/MICROWAVE WIDE BAND LOW POWER AMPLIFIER |
| TN5171PM | 20 MHz - 150 MHz RF/MICROWAVE WIDE BAND MEDIUM POWER AMPLIFIER |
| TOCP172-1MB | 970/1000 um, MULTI MODE, SIMPLEX FIBER OPTIC CONNECTOR |
| TOCP172-20CB | 970/1000 um, MULTI MODE, SIMPLEX FIBER OPTIC CONNECTOR |
| TOD5202FE | Optoelectronic |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TMX320DM6435AZDU | 制造商:Texas Instruments 功能描述: |
| TMX320DM6437AZDUA | 功能描述:開發(fā)板和工具包 - TMS320 Digl Media Processor RoHS:否 制造商:Texas Instruments 產品:Experimenter Kits 工具用于評估:F2802x 核心:TMS320 接口類型:UART, USB 工作電源電壓: |
| TMX320DM6437AZWTA | 制造商:Texas Instruments 功能描述:TMX320DM6437 PG1.1 361PIN PB-FREE NFBGA - Trays |
| TMX320DM6437BZDUA | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Dig Media Processor RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| TMX320DM6437BZWTA | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Dig Media Processor RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
發(fā)布緊急采購，3分鐘左右您將得到回復。