- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄365967 > TSB12LV26-EP 672-pin FineLine BGA PDF資料下載
參數(shù)資料
| 型號： | TSB12LV26-EP |
| 英文描述： | 672-pin FineLine BGA |
| 中文描述： | 軍事增強塑料的OHCI -山貓基于PCI的1394主控制器 |
| 文件頁數(shù)： | 28/106頁 |
| 文件大?。?/td> | 605K |
| 代理商： | TSB12LV26-EP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁當(dāng)前第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁
2
–
12
2.2.6
Isochronous Port Register at 18h
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
29 30 31
28
T
T
M
IRPORT1
IRPORT2
ISYNCRCVN
I
The power-up reset value of this register = 0000_0000h
BIT
NUMBER
BIT NAME
FUNCTION
DIR
DESCRIPTION
0
–
1
TAG1
Tag Field 1
R/W
The TAG1 field can further qualify the isochronous reception
for isochronous Receive PORT1 when the MONTAG bit is set.
2
–
7
IRPORT1
Isochronous
receive port
1 channel
number
R/W
IR port1 contains the channel number of the isochronous
packets that the receiver accepts. The receiver accepts
isochronous packets with this channel number when the
IRP1EN is set.
8
–
9
TAG2
Tag Field 2
R/W
The TAG2 field can further qualify the isochronous reception
for isochronous Receive PORT2 when the MONTAG bit is set.
10
–
15
IRPORT2
Isochronous
receive port
2 channel
number
R/W
IR port2 contains the channel number of the isochronous
packets that the receiver accepts. The receiver accepts
isochronous packets with this channel number when the
IRP2EN is set.
16
–
23
RESERVED
Reserved
24
–
27
ISYNCRCVN
Synchronous
Enable
R/W
In isochronous receive mode to the DM port, when the
ISYNCRCVN enable bits are high, the DMPRE terminal pulses
when an isochronous packet is received whose SYNC bit field
in its header matches the bit pattern in this field. The default is
0000b.
28
IRCVALL
Receive all
isochronous
packets
R/W
When the IRCVALL bit is set high, the TSB12LV32 receives all
isochronous packets regardless of the channel number or tag
number. The default is off.
29
–
30
RESERVED
Reserved
31
MONTAG
Match on tag
R/W
MONTAG is set when the user wants to only accept
isochronous packets that match both the tag field and the
channel number field. When set, MONTAG indicates that
isochronous receive data is accepted. The default is off.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TSB12LV22PZP | OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER |
| TSB12LV26PZ | OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER |
| TSB14AA1 | FPGA (Field-Programmable Gate Array) |
| TSB14AA1I | FPGA (Field-Programmable Gate Array) |
| TSB14AA1T | FPGA (Field-Programmable Gate Array) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TSB12LV26IPZT | 功能描述:1394 接口集成電路 OHCI-Lynx PCI-Based Host Controller RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB12LV26IPZTEP | 制造商:Texas Instruments 功能描述:1394 I-TEMP OHCI-LYNX PCI-BASED IEEE 1394 HOST CONTROLLER - Rail/Tube |
| TSB12LV26PZ | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER |
| TSB12LV26PZT | 功能描述:1394 接口集成電路 OHCI-Lynx PCI-Based Host Controller RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB12LV26PZTG4 | 功能描述:1394 接口集成電路 OHCI-Lynx PCI-Based IEEE1394 Host Cntrlr RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。