參數(shù)資料
型號(hào)： TSB12LV26-EP
英文描述： 672-pin FineLine BGA
中文描述： 軍事增強(qiáng)塑料的OHCI -山貓基于PCI的1394主控制器
文件頁(yè)數(shù)： 70/106頁(yè)
文件大小： 605K
代理商： TSB12LV26-EP
5
–
14
Figure 5
–
19 shows the timing diagram at 200 Mbps when the received packet contains only one quadlet
of payload.
Packet payload
0000
DMCLK
DMRW
DMD[0:15]
PKTFLAG
DMDONE
DMPRE
0000
Trailer quadlet
Header quadlet
Figure 5
–
19. Isochronous Receive With Header and Trailer at 200 Mbps
5.2.5
Asynchronous Packet Transmit With Automatic Header Insertion
Upon receiving a high on DMREADY, the following sequence of operations are performed:
Step 1:
DMDONE will be asserted low (deactivated) at the next DMCLK cycle.
Step 2:
The data mover will take the headers that have been loaded into the header0
–
header3
registers and request the link core to transmit the data onto the 1394 bus.
Step 3:
The link core will fetch the headers from the header0
–
header3 registers.
Step 4:
DMPRE will pulse for one DMCLK cycle before the first data quadlet is sent.
Step 5:
The data mover will then begin to fetch the data payload by asserting DMRW high.
Step 6:
When the link core has fetched the last data quadlet, the data mover waits until the
destination node returns an
ack_complete
immediate response. If an
ack_complete
is not
received, the data mover will assert DMERROR high and become disabled.
Figure 5
–
20 and Figure 5
–
21 show the timing diagram for this mode for the quadlet transmit and the block
transmit cases, respectively. For simplicity, a data block size of three quadlets was selected in Figure 5
–
20.
Figure 5
–
22 shows the block transmit case at 400 Mbps.
DMCLK
DMRW
DMD[0:15]
DMREADY
DMPRE
DMDONE
Figure 5
–
20. Asynchronous Quadlet Transmit With Automatic Header Insertion
DMCLK
DMRW
DMD[0:15]
DMREADY
DMPRE
DMDONE
Figure 5
–
21. Asynchronous Block Transmit With Automatic Header Insertion at 200 Mbps
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TSB12LV26IPZT 功能描述:1394 接口集成電路 OHCI-Lynx PCI-Based Host Controller RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray
TSB12LV26IPZTEP 制造商:Texas Instruments 功能描述:1394 I-TEMP OHCI-LYNX PCI-BASED IEEE 1394 HOST CONTROLLER - Rail/Tube
TSB12LV26PZ 制造商:TI 制造商全稱:Texas Instruments 功能描述:OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER
TSB12LV26PZT 功能描述:1394 接口集成電路 OHCI-Lynx PCI-Based Host Controller RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray
TSB12LV26PZTG4 功能描述:1394 接口集成電路 OHCI-Lynx PCI-Based IEEE1394 Host Cntrlr RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray
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