參數(shù)資料
型號(hào): TSB12LV26-EP
英文描述: 672-pin FineLine BGA
中文描述: 軍事增強(qiáng)塑料的OHCI -山貓基于PCI的1394主控制器
文件頁(yè)數(shù): 61/106頁(yè)
文件大?。?/td> 605K
代理商: TSB12LV26-EP
5
5
CFR REGISTER
Step 1
Data
Mover
Port
Header0 Register at 38h
Trailer Register at 48h
LINK CORE
Transmitter
Receiver
Step 2
Step 4
Step 4 (trailer quadlet)
Step 3 (packet data)
Step 2 (header quadlet)
Packet received from
1394 bus through the
Phy
Figure 5
6. Isochronous Receive With Header and Trailer
5.1.2
There are two ways (modes of operation) to transmit isochronous data through the data mover:
Isochronous Transmit
Isochronous packet transmit with automatic header insertion.
Isochronous packet transmit without automatic header insertion.
The difference between the two modes lies in the mechanism in which the header information is inserted
into the data stream. However, in both cases the header information is always loaded into the link core
transmitter from the header register.
5.1.2.1
In this mode, the header information is first loaded into the header0 register through the microcontroller
interface. The header will subsequently be automatically inserted into the data once the data mover starts
streaming it through to the link core transmitter logic. The following steps further illustrate the process:
Isochronous Packet Transmit With Automatic Header Insertion
CFR REGISTER
Step 4
Data
Mover
Port
Header0 Register at 38h
LINK CORE
Transmitter
Receiver
Step 2
Step 3
Step 3 (Packet Data)
Packet sent
to 1394 bus
through the
Phy
Step 1
Header
loaded
(packet data)
Micro-
controller
Interface
Step 1
Write
Header
Information
Figure 5
7. Isochronous Transmit With Auto Header Insertion
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