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參數(shù)資料
| 型號(hào)： | W6692ACF |
| 英文描述： | ISDN LINE INTERFACE|BASIC|CMOS|QFP|100PIN|PLASTIC |
| 中文描述： | 綜合業(yè)務(wù)數(shù)字網(wǎng)線接口|基本|的CMOS | QFP封裝| 100引腳|塑料 |
| 文件頁(yè)數(shù)： | 89/101頁(yè) |
| 文件大小： | 851K |
| 代理商： | W6692ACF |
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W6692A
Publication Release Date: July 2000
- 89 -
Revision A1
Bits 12-9 Data_Select Read
Used to select which data is to be reported through the Data register and Data_Scale field. Not
implemented. Read as 0.
Bit 8 PME_En Read/Write, Sticky
A "1" enables W6692A to assert PME#. When "0", PME# assertion is disabled. If the PME# is active,
writing "0" to this bit also clears the PME# signal.
Bits 7-2 Reserved
These bits are reserved and read as 0.
Bits 1-0 Power State Read/Write
Used to get or set the device's power state.
00b - D0: fully operational
01b - D1: Not responds to PCI IO and memory accesses (PCI transation may or may not present,
bus clock and VCC present), only responds to PCI configuration access, B2 HDLC stopped
10b - D2: Not responds to PCI IO and memory accesses (PCI transation may or may not present,
bus clock may or may not present, V
CC
present), only responds to PCI configuration access, B1
and B2 HDLCs stopped
11b - D3
hot
: only responds to PCI configuration access accesses (PCI transation may or may not
present, bus clock may or may not present, V
CC
may or may not present, 3.3Vaux present), a
software re-initialization of the chip must be performed when returns to D0
Note: When waken up by PME event, software must read ISTA register or issue RRST command to clear the queued interrupt
status bits.
9. ELECTRICAL CHARACTERISTICS
9.1 Absolute Maximum Rating
PARAMETER
SYMBOL
LIMIT VALUES
UNIT
Voltage on any pin with respect to ground
V
S
-0.4 to V
DD
+0.4
0 to 70
V
Ambient temperature under bias
T
A
°
C
V
Maximum voltage on V
DD
V
DD
6
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability
of the device.
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