參數(shù)資料
型號: XC3SD1800A-4CSG484LI
廠商: Xilinx Inc
文件頁數(shù): 11/101頁
文件大?。?/td> 0K
描述: IC FPGA SPARTAN 3 DSP 484CSGBGA
標(biāo)準(zhǔn)包裝: 84
系列: Spartan®-3A DSP
LAB/CLB數(shù): 4160
邏輯元件/單元數(shù): 37440
RAM 位總計: 1548288
輸入/輸出數(shù): 309
門數(shù): 1800000
電源電壓: 1.14 V ~ 1.26 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 484-FBGA,CSPBGA
供應(yīng)商設(shè)備封裝: 484-CSPBGA
Spartan-3A DSP FPGA Family: DC and Switching Characteristics
DS610 (v3.0) October 4, 2010
Product Specification
17
Differential Output Pairs
X-Ref Target - Figure 4
Figure 4: Differential Output Voltages
Table 13: DC Characteristics of User I/Os Using Differential Signal Standards
IOSTANDARD Attribute
VOD
VOCM
VOH
VOL
Min (mV)
Typ (mV)
Max (mV)
Min (V)
Typ (V)
Max (V)
Min (V)
Max (V)
LVDS_25
247
350
454
1.125
–1.375
LVDS_33
247
350
454
1.125
–1.375
BLVDS_25
240
350
460
–1.30
MINI_LVDS_25
300
600
1.0
–1.4
MINI_LVDS_33
300
600
1.0
–1.4
RSDS_25
100
400
1.0
–1.4
RSDS_33
100
400
1.0
–1.4
TMDS_33
400
–800
VCCO – 0.405
–VCCO – 0.190
PPDS_25
100
400
0.5
0.8
1.4
PPDS_33
100
400
0.5
0.8
1.4
DIFF_HSTL_I_18
–VCCO – 0.4
0.4
DIFF_HSTL_II_18
–VCCO – 0.4
0.4
DIFF_HSTL_III_18
–VCCO – 0.4
0.4
DIFF_HSTL_I
–VCCO – 0.4
0.4
DIFF_HSTL_III
–VCCO – 0.4
0.4
DIFF_SSTL18_I
–VTT + 0.475
VTT – 0.475
DIFF_SSTL18_II
–VTT + 0.603
VTT – 0.603
DIFF_SSTL2_I
–VTT + 0.61
VTT – 0.61
DIFF_SSTL2_II
–VTT + 0.81
VTT – 0.81
DIFF_SSTL3_I
VTT + 0.6
VTT - 0.6
DIFF_SSTL3_II
VTT + 0.8
VTT - 0.8
Notes:
1.
The numbers in this table are based on the conditions set forth in Table 7 and Table 12.
2.
3.
Output voltage measurements for all differential standards are made with a termination resistor (RT) of 100Ω across the N and P pins of the differential signal pair.
4.
At any given time, no more than two of the following differential output standards can be assigned to an I/O bank: LVDS_25, RSDS_25, MINI_LVDS_25, PPDS_25 when
VCCO=2.5V, or LVDS_33, RSDS_33, MINI_LVDS_33, TMDS_33, PPDS_33 when VCCO =3.3V
V
OUTN
V
OUTP
GND level
50%
V
OCM
V
OCM
V
OD
V
OL
V
OH
V
OUTP
Internal
Logic
V
OUTN
N
P
= Output common mode voltage =
2
V
OUTP +VOUTN
V
OD = Output differential voltage =
V
OH = Output voltage indicating a High logic level
V
OL
= Output voltage indicating a Low logic level
V
OUTP -VOUTN
Differential
I/O Pair Pins
DS312-3_03_090510
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