XRT74L73
3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
REV. P1.0.1
PRELIMINARY
241
valid M-bits. Recall from the discussion in Section
4.1
that each DS3 M-frame consists of three (3) M-bits
that occur in a repeating 010 pattern. The M-bit
search is declared successful if three consecutive M-
frames (or 21 F-frames) are detected correctly. Once
this occurs an M-frame lock is declared, and the Re-
ceive DS3 Framer block will then transition to the In-
Frame state. At this point, the Receive DS3 Framer
block will declare itself in the In-Frame condition, and
will begin Frame Maintenance operations. The Re-
ceive DS3 Framer block will then indicate that it has
transitioned from the OOF condition into the In-Frame
condition by doing the following.
Generate a Change in OOF Condition interrupt to
the local μP.
Negate the RxOOF output pin (e.g., toggle it
"Low").
Negate the RxOOF bit-field (Bit 4) within the
Receive DS3 Configuration and Status Register.
The Receive DS3 Framer can be configured to oper-
ate such that ’valid parity’ (P-bits) must also be de-
tected before the Receive DS3 Framer can declare it-
self In Frame. This configuration is set by writing the
appropriate data to the Rx DS3 Configuration and
Status Register, as depicted below.
Table 53 relates the contents of this bit field to the
framing acquisition criteria.
Once the Receive DS3 Framer block is operating in
the In-Frame condition, normal data recovery and
processing of the DS3 data stream begins. The max-
imum average reframing time is less than 1.5 ms.
4.3.2.2
Frame Maintenance Mode Operation
When the Receive DS3 Framer block is operating in
the In-Frame state (per Figure 88 ), it will then begin
to perform Frame Maintenance operations, where it
will continue to verify that the F- and M-bits are
present, at their proper locations. While the Receive
DS3 Framer block is operating in the Frame Mainte-
nance mode, it will declare an Out-of-Frame (OOF)
condition if 3 or 6 F-bits (depending upon user selec-
tion) out of 16 consecutive F-bits are in error. This
selection for the OOF Declaration criteria is made by
writing the appropriate value to bit 1 (F-Sync Algo) of
the Rx DS3 Configuration and Status Register, as de-
picted below.
RX DS3 CONFIGURATION AND STATUS REGISTER, (ADDRESS = 0X10)
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
RxAIS
RxLOS
RxIdle
RxOOF
Int LOS
Disable
Framing on
Parity
F-Sync Algo
M-Sync Algo
RO
RO
RO
RO
R/W
R/W
R/W
R/W
X
X
X
X
X
X
X
X
T
ABLE
53: T
HE
R
ELATIONSHIP
BETWEEN
THE
CONTENTS
OF
B
IT
2 (F
RAMING
ON
P
ARITY
)
WITHIN
THE
R
X
DS3
C
ONFIGURATION
AND
S
TATUS
R
EGISTER
,
AND
THE
RESULTING
F
RAMING
A
CQUISITION
C
RITERIA
F
RAMING
ON
P
ARITY
(B
IT
2)
F
RAMING
A
CQUISITION
C
RITERIA
0
The In-frame is declared after F-bit synchronization (10 F-bit matches) followed by M-bit synchronization (M-
bit matches for 3 DS3 M-frames)
1
The In-frame condition is declared after F-bit synchronization, followed by M-bit synchronization, with valid
parity over the frames. Also, the occurrence of parity errors in 2 or more out of 5 frames starts a frame
search
RX DS3 CONFIGURATION AND STATUS REGISTER, (ADDRESS = 0X10)
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
RxAIS
RxLOS
RxIdle
RxOOF
Int LOS
Disable
Framing on
Parity
F-Sync Algo
M-Sync Algo