XRT74L73
3 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
PRELIMINARY
REV. P1.0.1
56
0xn76F
Receive ATM - User Cell Filter # 2 - Filtered Cell Count Register - Byte 0
RUR
0x00
0xn770 - 0xn772
Reserved
0xn773
Receive ATM - User Cell Filter # 3 - Filter Control Register
R/W
0x00
0xn774
Receive ATM - User Cell Filter # 3 - Header Byte # 1 Pattern Register
R/W
0x00
0xn775
Receive ATM - User Cell Filter # 3 - Header Byte # 2 Pattern Register
R/W
0x00
0xn776
Receive ATM - User Cell Filter # 3 - Header Byte # 3 Pattern Register
R/W
0x00
0xn777
Receive ATM - User Cell Filter # 3 - Header Byte # 4 Pattern Register
R/W
0x00
0xn778
Receive ATM - User Cell Filter # 3 - Header Byte # 1 Check Register
R/W
0x00
0xn779
Receive ATM - User Cell Filter # 3 - Header Byte # 2 Check Register
R/W
0x00
0xn77A
Receive ATM - User Cell Filter # 3 - Header Byte # 3 Check Register
R/W
0x00
0xn77B
Receive ATM - User Cell Filter # 3 - Header Byte # 4 Check Register
R/W
0x00
0xn77C
Receive ATM - User Cell Filter # 3 - Filtered Cell Count Register - Byte 3
RUR
0x00
0xn77D
Receive ATM - User Cell Filter # 3 - Filtered Cell Count Register - Byte 2
RUR
0x00
0xn77E
Receive ATM - User Cell Filter # 3 - Filtered Cell Count Register - Byte 1
RUR
0x00
0xn77F
Receive ATM - User Cell Filter # 3 - Filtered Cell Count Register - Byte 0
RUR
0x00
0xn780 - 0xnEFF
Reserved
0xnF00
Transmit ATM Control Register - Byte 3
R/W
0x00
0xnF01
Transmit ATM Control Register - Byte 2
R/W
0x00
0xnF02
Transmit ATM Control Register - Byte 1
R/W
0x00
0xnF03
Transmit ATM Control Register - Byte 0Transmit PPP Control Register -
Byte 2
R/W
0x00
0xnF04
Transmit ATM Status Register - Byte 3
R/O
0x00
0xnF05
Transmit ATM Status Register - Byte 2
R/O
0x00
0xnF06
Transmit ATM Status Register - Byte 1
R/O
0x00
0xnF07
Transmit ATM Status Register - Byte 0
R/O
0x00
0xnF08 - 0xnF0A
Reserved
0xnF0B
Transmit ATM Cell Processor Interrupt Status RegisterTransmit PPP
Interrupt Status Register
RUR
0x00
0xnF0C - 0xnF0E
Reserved
0xnF0F
Transmit ATM Cell Processor Interrupt Enable Register Transmit PPP
Interrupt Enable Register
R/W
0x00
RECEIVE ATM CELL PROCESSOR/PPP PROCESSOR BLOCK CONTROL REGISTERS
A
DDRESS
L
OCATION
R
EGISTER
N
AME
T
YPE
D
EFAULT
V
ALUE
CHANNEL N (N=1, 2, 3) CONTROL REGISTERS
RECEIVE ATM CELL PROCESSOR/PPP PROCESSOR BLOCK CONTROL REGISTERS