參數(shù)資料
型號： XRT83L34IV
廠商： Exar Corporation
文件頁數(shù)： 13/99頁
文件大小： 0K
描述： IC LIU T1/E1/J1 QUAD 128TQFP
標(biāo)準(zhǔn)包裝： 72
類型： 線路接口裝置（LIU）
驅(qū)動器/接收器數(shù)： 4/4
規(guī)程： T1，E1，J1
電源電壓： 3.135 V ~ 3.465 V
安裝類型： 表面貼裝
封裝/外殼： 128-LQFP
供應(yīng)商設(shè)備封裝： 128-TQFP（14x20）
包裝： 托盤
XRT83L34
xr
REV. 1.0.1
QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
17
PTS1
PTS2
RCLKE
TCLKE
106
107
106
107
I
Microprocessor Type Select Input Pins/Receive Clock Edge Select/
Transmit Clock Edge Select Input Pin:
The exact function of these input pins depends upon whether the XRT83L34
device has been configured to operate in the HOST or Hardware Mode, as
described below.
HOST Mode Operation - Microprocessor Type Select Input Bits 2 and 1 -
PTS[2:1]:
These two input pins permit the user to configure the Microprocessor Inter-
face to operate in either of the following modes.
Intel-Asynchronous Mode
Motorola-Asynchronous Mode
The relationship between the settings of these input pins and the corre-
sponding Microprocessor Interface configuration is presented below.
NOTE:
The
PTS2 (pin107) should be tied to GND. The PTS1(pin 106)
input pin permits the user to selects either the Intel-Asynchronous or
the Motorola Asynchronous Modes.
Hardware Mode Operation - Receive Clock Edge Select Input pin:
Hardware Mode Operation - Transmit Clock Edge Select Input pin:
NOTE: These pins are internally pulled “Low” with a 50k
resistor.
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]/
D[1]/
D[0]/
LOOP1_0
LOOP0_0
LOOP1_1
LOOP0_1
LOOP1_2
LOOP0_2
LOOP1_3
LOOP0_3
42
43
44
45
46
47
48
49
42
43
44
45
46
47
48
49
I/O
Bi-Directional Data Bus Pins/Loop-back Control Input Pins - D[7:0]:
The exact function of these input/output pins depends upon whether the
XRT83L34 device has been configured to operate in the HOST or Hardware
Mode, as described below.
HOST Mode Operation - Bi-Directional Data Bus Input/Output Pins
(Microprocessor Interface block) - D[7:0]:
These pins are used to drive and receive data over the bi-directional data
bus, whenever the Microprocessor performs a READ or WRITE operation
with the Microprocessor Interface of the XRT83L34 device.
Hardware Mode Operation - Loop-back Control pin, Bits
[1:0]_Channel_n - Hardware Mode
Pins 42 - 49 control which Loop-Back mode is selected per channel.
NOTE: Internally pulled “Low” with a 50k
resistor.
SIGNAL NAME
PIN #TYPE
DESCRIPTION
PTS2
PTS1
0
1
P Type
Intel Asynchronous Mode
Motorola Asynchronous Mode
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XRT83L34IV-F 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT83L34IVTR 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT83L34IVTR-F 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT83L38 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
XRT83L38_07 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
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