參數(shù)資料
型號(hào): XRT83L34IV
廠商: Exar Corporation
文件頁數(shù): 39/99頁
文件大?。?/td> 0K
描述: IC LIU T1/E1/J1 QUAD 128TQFP
標(biāo)準(zhǔn)包裝: 72
類型: 線路接口裝置(LIU)
驅(qū)動(dòng)器/接收器數(shù): 4/4
規(guī)程: T1,E1,J1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 128-LQFP
供應(yīng)商設(shè)備封裝: 128-TQFP(14x20)
包裝: 托盤
XRT83L34
xr
REV. 1.0.1
QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
41
RECEIVE 1:1 & 1+1 REDUNDANCY
For 1:1 and 1+1 redundancy, the receivers on the primary card should be programmed for Internal Impedance
mode. The receivers on the backup card should be programmed for External Impedance mode. Since there is
no external resistor in the circuit, the receivers on the backup card will be high impedance. This key design
feature eliminates the need for relays and provides one bill of materials for all interface modes of operation.
Select the impedance for the desired mode of operation, T1/E1/J1. To swap the primary card, set the backup
card to Internal Impedance mode, then the primary card to External Impedance mode. See Figure 17 for a
simplified block diagram of the receive section for a 1:1 and 1+1 redundancy scheme.
NOTE: For simplification, the over voltage protection circuitry was omitted.
N+1 REDUNDANCY
FIGURE 16. SIMPLIFIED BLOCK DIAGRAM OF THE TRANSMIT SECTION FOR 1:1 & 1+1 REDUNDANCY
FIGURE 17. SIMPLIFIED BLOCK DIAGRAM - RECEIVE SECTION FOR 1:1 AND 1+1 REDUNDANCY
T 1/E 1 Line
B ack plane Interface
Prim ary C ard
B ackup C ard
X R T 83L34
Tx
Line Interface C ard
0.68 F
T xT S E L=1, In ternal
1:2 or 1:2.45
R xT S E L=0, E xternal
R xT S E L=1, Internal
B ack plane Inte rface
Prim ary C ard
B ackup C ard
X R T 83L34
Rx
Line Interface C ard
T 1/E 1 Line
Rx
1:1
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