參數(shù)資料
型號: XRT83VSH316IB
廠商: Exar Corporation
文件頁數(shù): 20/98頁
文件大?。?/td> 0K
描述: IC LIU SH T1/E1/J1 16CH 316STBGA
標(biāo)準(zhǔn)包裝: 60
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 16/16
規(guī)程: T1,E1,J1
電源電壓: 3.14 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 316-LBGA
供應(yīng)商設(shè)備封裝: 316-STBGA(21x21)
包裝: 托盤
XRT83VSH316
24
REV. 1.0.1
16-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
3.5
General Alarm Detection and Interrupt Generation
The receive path and transmit path detect RLOS/SLOS, AIS/SAIS, PRBS/SPRBS, and Line Side LCV and
DMO. These alarms can be individually masked to prevent the alarm from triggering an interrupt. To enable
interrupt generation, the Global Interrupt Enable (GIE) bit must be set "High" in the appropriate global register.
Any time a change in status occurs (it the alarms are enabled), the interrupt pin will pull "Low" to indicate an
alarm has occurred. Once the status registers have been read, the INT pin will return "High". The status
registers are Reset Upon Read (RUR).
The interrupts are categorized in a hierarchical process block.
Figure 10 is a simplified block diagram of the interrupt generation process.
FIGURE 10. INTERRUPT GENERATION PROCESS BLOCK
NOTE: The interrupt pin is an open-drain output that requires a 10k
external pull-up resistor.
Global Interrupt
Enable (GIE="1")
Global Channel Interrupt Status
(Indicates Which Channel(s) Experienced a Change in
Status)
Individual Alarm Status Change
(Indicates Which Alarm Experienced a Change)
Individual Alarm Indication
(Indicates the Alarm Condition Active/Inactive)
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