參數(shù)資料
型號(hào)： XRT83VSH316IB
廠商： Exar Corporation
文件頁(yè)數(shù)： 80/98頁(yè)
文件大?。?/td> 0K
描述： IC LIU SH T1/E1/J1 16CH 316STBGA
標(biāo)準(zhǔn)包裝： 60
類型： 線路接口裝置（LIU）
驅(qū)動(dòng)器/接收器數(shù)： 16/16
規(guī)程： T1，E1，J1
電源電壓： 3.14 V ~ 3.47 V
安裝類型： 表面貼裝
封裝/外殼： 316-LBGA
供應(yīng)商設(shè)備封裝： 316-STBGA（21x21）
包裝： 托盤
XRT83VSH316
78
REV. 1.0.1
16-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
D2
INSBPV
Insert Bipolar Violation
When this bit transitions from a "0" to a "1", a bipolar violation will
be inserted in the transmitted data from TPOS, QRSS/PRBS pat-
tern. The state of this bit will be sampled on the rising edge of
TCLK. To ensure proper operation, it is recommended to write a
"0" to this bit before writing a "1".
R/W
0
D1
INSBER
Insert Bit Error
When this bit transitions from a "0" to a "1", a bit error will be
inserted in the transmitted QRSS/PRBS pattern. The state of this
bit will be sampled on the rising edge of TCLK. To ensure proper
operation, it is recommended to write a "0" to this bit before writing
a "1".
R/W
0
D0
Reserved
This Bit is Reserved
R/W
0
TABLE 47: MICROPROCESSOR REGISTER 0XN04H BIT DESCRIPTION
CHANNEL N (0XN04H)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D7
Reserved
This Bit is Reserved
R/W
0
D6
DMOIE
Digital Monitor Output Interrupt Enable
0 = Masks the DMO function
1 = Enables Interrupt Generation
R/W
0
D5
FLSIE
FIFO Limit Status Interrupt Enable
0 = Masks the FLS function
1 = Enables Interrupt Generation
R/W
0
D4
LCV_OFIE Line Code Violation / Counter Overflow Interrupt Enable
0 = Masks the LCV_OF function
1 = Enables Interrupt Generation
R/W
0
D3
Reserved
This Bit is Reserved
R/W
0
D2
AISDIE
Alarm Indication Signal Detection Interrupt Enable
0 = Masks the AIS function
1 = Enables Interrupt Generation
R/W
0
D1
RLOSIE
Receiver Loss of Signal Interrupt Enable
0 = Masks the RLOS function
1 = Enables Interrupt Generation
R/W
0
D0
QRPDIE
Quasi Random Pattern Detect Interrupt Enable
0 = Masks the QRPD function
1 = Enables Interrupt Generation
R/W
0
TABLE 46: MICROPROCESSOR REGISTER 0XN03H BIT DESCRIPTION
CHANNEL N (0XN03H)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
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