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參數(shù)資料
| 型號： | ZL50030GAC |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 路由/交換 |
| 英文描述： | Flexible 4 K x 2 K Channel Digital Switch with H.110 Interface and 1 K x 1 K Local Switch |
| 中文描述： | TELECOM, DIGITAL TIME SWITCH, PBGA220 |
| 封裝： | 17 X 17 MM, 1.61 MM HEIGHT, PLASTIC, MS-034, BGA-220 |
| 文件頁數(shù)： | 20/73頁 |
| 文件大?。?/td> | 681K |
| 代理商： | ZL50030GAC |
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ZL50030
Data Sheet
20
Zarlink Semiconductor Inc.
12.0 Backplane Connection Memory
The backplane connection memory controls the switching configuration of the backplane interface. Locations in the
backplane connection memory are associated with particular BSTio streams.
The BTM2 - 0 bits of each backplane connection memory entry allow the per-channel selection from message
mode, connection mode (constant delay or variable delay), high impedance mode, or bit error rate test mode. The
backplane connection memory is also where the BSTio channels are set to be either inputs or outputs. See
Table 24 on page 51 for the per-channel control functions.
In the switching mode, the contents of the backplane connection memory stream address bits (BSAB4-0) and
channel address bits (BCAB7-0) define the source information (stream and channel) of the time slot that will be
switched to the backplane BSTio streams. During message mode, the 8 least significant bits of the backplane
connection memory will be transferred to the BSTio pins.
13.0 Local Connection Memory
The local connection memory controls the local interface switching configuration. Locations in the local connection
memory are associated with particular LSTio streams.
The LTM2 - 0 bits of each local connection memory entry allow the per-channel selection from message mode,
connection mode (constant delay or variable delay), high impedance mode, or bit error rate test mode. The local
connection memory is also where the LSTio channels are set to be either inputs or outputs. See Table 27 on
page 53 for the per-channel control functions.
A13
(Note 1)
Stream Address (ST0-31)
Channel Address (Ch0-255)
A12
A11
A10
A9
A8
Stream #
A7
A6
A5
A4
A3
A2
A1
A0
Channel #
1
1
1
1
1
1
1
1
1
.
.
.
.
.
.
.
1
1
1
1
1
0
0
0
0
0
0
0
0
0
.
.
0
.
.
.
.
1
1
1
1
1
0
0
0
0
0
0
0
0
1
.
.
1.
.
.
.
.
1
1
1
1
1
0
0
0
0
1
1
1
1
0
.
.
1
.
.
.
.
0
1
1
1
1
0
0
1
1
0
0
1
1
0
.
.
1
.
.
.
.
1
0
0
1
1
0
1
0
1
0
1
0
1
0
.
.
1
.
.
.
.
1
0
1
0
1
Stream 0
Stream 1
Stream 2
Stream 3
Stream 4
Stream 5
Stream 6
Stream 7
Stream 8
.
.
Stream 15
(Note 6).
.
.
.
Stream 27
Stream 28
Stream 29
Stream 30
Stream 31
0
0
.
.
0
0
0
0
.
.
0
0
.
.
0
0
.
.
.
1
1
0
0
.
.
0
0
0
0
.
.
0
0
.
.
1
1
.
.
.
1
1
0
0
.
.
0
0
1
1
.
.
1
1
.
.
1
1
.
.
.
1
1
0
0
.
.
1
1
0
0
.
.
1
1
.
.
1
1
.
.
1
1
0
0
.
.
1
1
0
0
.
.
1
1
.
.
1
1
.
.
.
1
1
0
0
.
.
1
1
0
0
.
.
1
1
.
.
1
1
.
.
.
1
1
0
0
.
.
1
1
0
0
.
.
1
1
.
.
1
1
.
.
.
1
1
0
1
.
.
0
1
0
1
.
.
0
1
.
.
0
1
.
.
.
0
1
Ch 0
Ch 1
.
.
Ch 30
Ch 31 (Note 2)
Ch 32
Ch 33
.
.
Ch 62
Ch 63 (Note 3)
.
.
Ch 126
Ch 127 (Note 4)
.
.
.
Ch 254
Ch 255 (Note 5)
Notes:
1. A13 must be high for access to data and connection memory positions. A13 must be low for access to registers.
2. Channels 0 to 31 are used when serial stream is at 2 Mbps.
3. Channels 0 to 63 are used when serial stream is at 4 Mbps.
4. Channels 0 to 127 are used when serial stream is at 8 Mbps.
5. Channels 0 to 255 are used when serial stream is at 16 Mbps.
6. The local side uses Streams 0 to 15 only while the backplane uses streams 0 to 31.
Table 7 - Address Map for Memory Locations (A13 = 1)
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