參數(shù)資料
型號(hào)： ZL50030GAC
廠商： ZARLINK SEMICONDUCTOR INC
元件分類： 路由/交換
英文描述： Flexible 4 K x 2 K Channel Digital Switch with H.110 Interface and 1 K x 1 K Local Switch
中文描述： TELECOM, DIGITAL TIME SWITCH, PBGA220
封裝： 17 X 17 MM, 1.61 MM HEIGHT, PLASTIC, MS-034, BGA-220
文件頁(yè)數(shù)： 68/73頁(yè)
文件大?。?/td> 681K
代理商： ZL50030GAC
ZL50030
Data Sheet
68
Zarlink Semiconductor Inc.
Characteristics are over recommended operating conditions unless otherwise stated.
Typical figures are at 25
°
C and are for design aid only: not guaranteed and not subject to production testing.
* Note 1: High Impedance is measured by pulling to the appropriate rail with R
L
, with timing corrected to cancel the time taken to discharge C
L
.
Figure 34 - Serial Output and External Control
AC Electrical Characteristics
- Local and Backplane Tristate Timing
Characteristic
Sym.
Min.
Typ.
Max.
Units
Test Conditions
1
LSTio/BSTio Delay - Active to High-Z
- High-Z to Active
2.048 Mbps (local)
4.096 Mbps (local)
8.192 Mbps (local)
8.192 Mbps (backplane)
16.384 Mbps (backplane)
Output Driver Enable (ODE) Delay
- High-Z to Active
2.048 Mbps (local)
4.096 Mbps (local)
8.192 Mbps (local)
8.192 Mbps (backplane)
16.384 Mbps (backplane)
Output Driver Disable (ODE) Delay
- Active to High-Z
2.048 Mbps (local)
4.096 Mbps (local)
8.192 Mbps (local)
8.192 Mbps (backplane)
16.384 Mbps (backplane)
t
DZ,
t
ZD
-19.5
-19.5
-19.5
-8.5
-8.5
-4
-4
-4
14.5
14.5
ns
ns
ns
ns
ns
R
L
= 1 K,
C
L
30 pF,
See Note 1.
2
t
ZD_ODE
37
37
37
20
20
ns
ns
ns
ns
ns
2
t
DZ_ODE
20
20
20
20
20
ns
ns
ns
ns
ns
t
DZ
LSTio/BSTio
t
ZD
LSTio/BSTio
ST_CKo0/1
(Output)
V
TT
V
TT
Tri-state
Valid Data
V
TT
Tri-state
Valid Data
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