參數(shù)資料
型號: 73M1922-DB
廠商: Maxim Integrated Products
文件頁數(shù): 74/82頁
文件大?。?/td> 0K
描述: BOARD DEMO 73M1922 20-TSSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 1
主要目的: *
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已用 IC / 零件: *
主要屬性: *
次要屬性: *
已供物品: 板,CD
73M1822/73M1922 Data Sheet
DS_1x22_017
76
Rev. 1.6
13.1 Loopback Controls
Table 48 describes the registers used for loopback control.
Table 48: Loopback Controls
Function
Mnemonic
Register
Location
Type
Description
TMEN
0x02[7]
W
Test Mode Enable
Used to enable the activation of the test loops controlled by
the DTST bits (DIGLB1 and INTLB1).
0 = No DTST loops enable. (Default)
1 = DTST loops enable.
TMEN has to be set to 1 before the setting of the DTST
bits.
DTST
0x07[3:0]
W
These control bits enable DIGLB1 and INTLB1.
Prior to writing to these bits, TMEN must be set to 1.
DTST1
DTST0
Selected Test Mode
0
Normal (Default)
1
0
DIGLB1
1
INTLB1
TEST
0x18[7:4]
W
This four-bit field is used to enable the loopback mode per the
following table:
TEST
Loopback Mode
0000
Normal mode. (Default)
Transmit and receive channels are independent.
0001
Digital loopback mode. Transmit Bit Stream (TBS)
is looped back to receive digital channel and
received (DIGLB2).
0010
Remote Analog loopback. Receive analog signal
is converted to Received Bit Stream (RBS) and is
looped back to TBS and the analog transmit
channel (INTLB2).
0011
Analog loopback. The transmit data is connected
to the receiver at the analog interface and
received (ALB).
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