一本大道无码一区二区天天爽,亚洲AV无码成人精品区狼人影院

<fieldset id="j6cz4"></fieldset>

您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄360546 > 79RC32V333-100DH Microprocessor PDF資料下載

IDT MIPS32 4Kc Processor Core

CP0 Registers

79RC32438 User Reference Manual

November 4, 2002

EntryHi Register (CP0 Register 10, Select 0)

The EntryHi register contains the virtual address match information used for TLB read, write, and access

operations. A TLB exception (TLB Refill, TLB Invalid, or TLB Modified) causes bits VA31:13 of the virtual

address to be written into the VPN2 field of the EntryHi register. The ASID field is written by software with

the current address space identifier value and is used during the TLB comparison process to determine

TLB match. The VPN2 field of the EntryHi register is not defined after an address error exception. This

EntryHi Register Format

Compare Register (CP0 Register 11, Select 0)

The Compare register acts in conjunction with the Count register to implement a timer and timer inter-

rupt function. The timer interrupt is an output of the cores. The Compare register maintains a stable value

and does not change on its own. When the value of the Count register equals the value of the Compare

The SI_TimerInt pin can be fed back into the core on one of the interrupt pins to generate an interrupt.

Traditionally, this has been done by multiplexing it with hardware interrupt 5 to set interrupt bit IP(7) in the

Cause register.

For diagnostic purposes, the Compare register is a read/write register. In normal use, however, the

Compare register is write-only. Writing a value to the Compare register, as a side effect, clears the timer

Compare Register Format

of the virtual address (virtual page number /

2). This field is written by hardware on a TLB excep-

tion or on a TLB read, and is written by software

before a TLB write.

Must be written as zero; returns zero on read.

Address space identifier. This field is written by hard-

ware on a TLB read and by software to establish the

current ASID value for TLB write and against which

TLB references match each entry’s TLB ASID field.

Table 2.37 EntryHi Register Field Descriptions

Interval count compare value

Table 2.38 Compare Register Field Description

相關(guān)PDF資料	PDF描述
79RC32V333-100DHI	8-Pin, 1.5KB Flash Program, 64B Flash Data, 8MHz Internal Oscillator, -40C to +85C, 8-DFN, T/R
79RC32V333-133DH	8-pin, 1.5KB Flash Program, 64B Flash Data, 8MHz Internal Oscillator, -40C to +85C, 8-SOIC 150mil, T/R
79RC32V333-133DHI	Microprocessor
79RC32V333-150DH	8 PIN, 1.75KB, FLASH, 64B RAM, COMPARATOR, 8MHZ INTERNAL OSCILLATOR, -40C to +125C, 8-PDIP, TUBE
79RC32V333-150DHI	Microprocessor

相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
79RC32V333-100DHI	制造商:未知廠家制造商全稱(chēng):未知廠家功能描述:Microprocessor
79RC32V333-133DH	制造商:未知廠家制造商全稱(chēng):未知廠家功能描述:Microprocessor
79RC32V333-133DHI	制造商:未知廠家制造商全稱(chēng):未知廠家功能描述:Microprocessor
79RC32V333-150DH	制造商:未知廠家制造商全稱(chēng):未知廠家功能描述:Microprocessor
79RC32V333-150DHI	制造商:未知廠家制造商全稱(chēng):未知廠家功能描述:Microprocessor

發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

*型號(hào)	*數(shù)量	廠商	批號(hào)	封裝