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IDT MIPS32 4Kc Processor Core
Memory Management
79RC32438 User Reference Manual
2 - 26
November 4, 2002
Notes
Debug Mode
Debug mode address space is identical to Kernel mode address space with respect to mapped and
unmapped areas, except for kseg3. In kseg3, a debug segment dseg co-exists in the virtual address range
0xFF20_0000 to 0xFF3F_FFFF. The layout is shown in Figure 2.23.
Figure 2.23 Debug Mode Virtual Address Space
The dseg is sub-divided into the dmseg segment at 0xFF20_0000 to 0xFF2F_FFFF which is used when
the probe services the memory segment, and the drseg segment at 0xFF30_0000 to 0xFF3F_FFFF which
is used when memory mapped debug registers are accessed. The subdivision and attributes for the
segments are shown in Table 2.8.
Accesses to memory that would normally cause an exception if tried from kernel mode cause the core to
re-enter debug mode via a debug mode exception. This includes accesses usually causing a TLB exception
(4Kc core only), with the result that such accesses are not handled by the usual memory management
routines. The unmapped kseg0 and kseg1 segments from kernel mode address space are available from
debug mode, which allows the debug handler to be executed from uncached and unmapped memory.
Conditions and Behavior for Access to drseg and EJTAG Registers
The behavior of CPU access to the drseg address range at 0xFF30_0000 to 0xFF3F_FFFF is deter-
mined as shown in Table 2.9.
Segment
Name
Sub-segment
Name
Virtual
Address
Generates
Physical
Address
Cache
Attribute
dseg
dmseg
0xFF20_0000
through
0xFF2F_FFFF
mseg maps to
addresses 0x0_0000
- 0xF_FFFF in
EJTAG probe mem-
ory space.
Uncached
drseg
0xFF30_0000
through
0xFF3F_FFFF
drseg maps to the
breakpoint registers
0x0_0000 -
0xF_FFFF
Table 2.8 Physical Address and Cache Attributes for dseg, dmseg, and drseg Address Spaces
0x0000_0000
0xFF20_0000
0xFF40_0000
0xFFFF_FFFF
dseg
kseg1
kseg0
Unmapped
Mapped if mapped in Kernel Mode