
IDT Debugging and Performance Monitoring
IPBus Monitor Registers
79RC32438 User Reference Manual
18 - 5
November 4, 2002
Notes
TIP
Description:
IPBus Monitor Trigger Input Polarity.
This bit selects the active polarity of the IPBus Monitor
Trigger Input (IPBMTRIGINP). IPBMTRIGINP is a GPIO alternate function and is sampled by
EXTCLK.
0 - IPBMTRIGINP is active low (trigger when signal transitions from 1 to 0)
1 - IPBMTRIGINP is active high (trigger when signal transitions from 0 to 1)
Initial Value:
0x0
Read Value:
Previous value written
Write Effect:
Modify value
TOM
Description:
IPBus Monitor Trigger Output Mode.
This bit selects the operating mode of the IPBus Monitor
Trigger Output (IPBMTRIGOUT).
0 - IPBMTRIGOUT is driven low for one EXTCLK clock cycle when final trigger occurs
1 - IPBMTRIGOUT is driven high for one EXTCLK clock cycle when final trigger occurs
2 - IPBMTRIGOUT is inverted (i.e., toggled) when final trigger event occurs
3 - reserved
Initial Value:
0x0
Read Value:
Previous value written
Write Effect:
Modify value
TCOUNT
Description:
Trigger Count.
This field contains a trigger count which is decremented each time a trigger
event occurs.
Initial Value:
0x0
Read Value:
Previous value written
Write Effect:
Modify value
RTCOUNT
Description:
Rearm Trigger Count.
This field contains the rearm trigger count value which is loaded into the
TCOUNT field whenever the IPBus monitor is automatically rearmed (i.e., when the RA bit is set
and the final trigger event occurs).
Initial Value:
0x0
Read Value:
Previous value written
Write Effect:
Modify value
DIE
Description:
Debug Interrupt Enable.
When this bit is set in the IPBMTCFG register, an EJTAG debug inter-
rupt request is generated to the CPU core whenever the FT bit is set. This allows synchroniza-
tion between the IPBus monitor and an external EJTAG ICE.
Initial Value:
0x0
Read Value:
Previous value written
Write Effect:
Modify value