LAN Controller Registers (B1:D8:F0)
7-8
Intel
82801BA ICH2 Datasheet
7.1.20
CAP_ID—Capability ID Register
(LAN Controller—B1:D8:F0)
Offset Address:
Default Value:
DCh
01h
Attribute:
Size:
RO
8 bits
7.1.21
NXT_PTR—Next Item Pointer (LAN Controller—B1:D8:F0)
Offset Address:
Default Value:
DDh
00h
Attribute:
Size:
RO
8 bits
7.1.22
PM_CAP—Power Management Capabilities
(LAN Controller—B1:D8:F0)
Offset Address:
Default Value:
DE–DFh
FE22h
Attribute:
Size:
RO
16 bits
Bit
Description
7:0
Capability ID (CAP_ID)
—
RO. Hardwired to 01h to indicate that the ICH2’s integrated LAN
Controller supports PCI Power Management.
Bit
Description
7:0
Next Item Pointer (NXT_PTR)
—
RW. Hardwired to 00b to indicate that power management is the
last item in the Capabilities list.
Bit
Description
15:11
PME Support.
Hardwired to 11111b. This 5-bit field indicates the power states in which the LAN
Controller may assert PME#. The LAN Controller supports wake-up in all power states.
10
D2 Support.
Hardwired to 1 to indicate that the LAN Controller supports the D2 power state.
9
D1 Support.
Hardwired to 1 to indicate that the LAN Controller supports the D1 power state.
8:6
Auxiliary Current.
Hardwired to 000b to indicate that the LAN Controller implements the Data
registers. The auxiliary power consumption is the same as the current consumption reported in the
D3 state in the Data register.
5
Device Specific Initialization (DSI).
Hardwired to 1 to indicate that special initialization of this
function is required (beyond the standard PCI configuration header) before the generic class device
driver is able to use it. DSI is required for the LAN Controller after D3-to-D0 reset.
4
Reserved
3
PME Clock.
Hardwired to 0 to indicate that the LAN Controller does not require a clock to generate
a power management event.
2:0
Version.
Hardwired to 010b to indicate that the LAN Controller complies with of the PCI Power
Management Specification, Revision 1.1.
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