Intel
82801BA ICH2 Datasheet
9-1
LPC Interface Bridge Registers (D31:F0)
LPC Interface Bridge Registers (D31:F0)
9
The LPC Bridge function of the ICH2 resides in PCI Device 31:Function 0. This function contains
many other functional units (e.g., DMA and Interrupt Controllers, Timers, Power Management,
System Management., GPIO, RTC, and LPC Configuration Registers).
Registers and functions associated with other functional units (power management, GPIO, USB,
IDE, etc.) are described in their respective sections.
9.1
PCI Configuration Registers (D31:F0)
Note:
Registers that are not shown should be treated as Reserved (See
Section 6.2
for details).
.
Table 9-1. PCI Configuration Map (LPC I/F—D31:F0)
Offset
Mnemonic
Register Name
Default
Type
00h–01h
VID
Vendor ID
8086h
RO
02h–03h
DID
Device ID
2440h
RO
04h–05h
PCICMD
PCI Command Register
000Fh
R/W
06h–07h
PCISTS
PCI Device Status Register
0280h
R/W
08h
RID
Revision ID
See Note
RO
09h
PI
Programming Interface
00h
RO
0Ah
SCC
Sub Class Code
01h
RO
0Bh
BCC
Base Class Code
06h
RO
0Eh
HEADT
Header Type
80h
RO
40h–43h
PMBASE
ACPI Base Address Register
00000001h
R/W
44h
ACPI_CNTL
ACPI Control
00h
R/W
4Eh–4Fh
BIOS_CNTL
BIOS Control Register
0000h
R/W
54h
TCO_CNTL
TCO Control
00h
R/W
58h–5Bh
GPIO_BASE
GPIO Base Address Register
00000001h
R/W
5Ch
GPIO_CNTL
GPIO Control Register
00h
R/W
60h–63h
PIRQ[
n
]_ROUT
PIRQ[A–D] Routing Control
80808080h
R/W
64h
SIRQ_CNTL
Serial IRQ Control Register
10h
R/W
68h–6Bh
PIRQ[
n
]_ROUT
PIRQ[E–H] Routing Control
80808080h
R/W
88h
D31_ERR_CFG
Device 31 Error configuration Register
00h
R/W
8Ah
D31_ERR_STS
Device 31 Error Status Register
00h
R/W
90h–91h
PCI_DMA_C
PCI DMA Configuration Registers
0000h
R/W
A0h–CFh
Power Management Registers
See
Section 9.8.1
D0h–D3h
GEN_CNTL
General Control
00000000h
R/W
D4h–D7h
GEN_STS
General Status
00000F00h
R/W
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