Intel
82801BA ICH2 Datasheet
9-73
LPC Interface Bridge Registers (D31:F0)
9.8.3.15
DEVTRAP_EN—Device Trap Enable Register
I/O Address:
Default Value
Lockable:
Power Well:
PMBASE +48h
0000h
No
Core
Attribute:
Size:
Usage:
R/W
16-bit
Legacy Only
This register enables the individual trap ranges to generate an SMI# when the corresponding status
bit in the DEVACT_STS register is set. When a range is enabled, I/O cycles associated with that
range will not be forwarded to LPC or IDE.
1
IDE Primary Drive 1 Activity Status (IDEP1_ACT_STS)
—R/WC.
0 = Indicates that there has been no access to this device’s I/O range.
1 = This device’s I/O range has been accessed. Clear this bit by writing a 1 to the bit location.
0
IDE Primary Drive 0 Activity Status (IDEP0_ACT_STS)
—R/WC.
0 = Indicates that there has been no access to this device’s I/O range.
1 = This device’s I/O range has been accessed. Clear this bit by writing a 1 to the bit location.
Bit
Description
Bit
Description
15:14
Reserved
13
ADLIB Trap Enable (ADLIB_TRP_EN)
—R/W.
0 = Disable.
1 = Enable.
12
KBC Trap Enable (KBC_TRP_EN)
—R/W. KBC (60/64h).
0 = Disable.
1 = Enable.
11
MIDI Trap Enable (MIDI_TRP_EN)
—R/W.
0 = Disable.
1 = Enable.
10
Audio Trap Enable (AUDIO_TRP_EN)
—R/W.
Audio (Sound Blaster “ORed” with MSS).
0 = Disable.
1 = Enable.
9:6
Reserved
5
LEG_IO_TRP_EN
—R/W.
Parallel Port, Serial Port 1, Serial Port 2, Floppy Disk Controller.
0 = Disable.
1 = Enable.
4
Reserved.
3
IDE Secondary Drive 1 Trap Enable (IDES1_TRP_EN)
—R/W.
0 = Disable.
1 = Enable.
2
IDE Secondary Drive 0 Trap Enable (IDES0_TRP_EN)—
R/W.
0 = Disable.
1 = Enable.
1
IDE Primary Drive 1 Trap Enable (IDEP1_TRP_EN)
—R/W.
0 = Disable.
1 = Enable.
0
IDE Primary Drive 0 Trap Enable (IDEP0_TRP_EN)—
R/W.
0 = Disable.
1 = Enable.
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