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參數(shù)資料
型號(hào)： ADSP-21489KSWZ-4B
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 23/68頁(yè)
文件大?。?/td> 0K
描述： IC CCD SIGNAL PROCESSOR 176LQFP
標(biāo)準(zhǔn)包裝： 1
系列： SHARC®
類型： 浮點(diǎn)
接口： EBI/EMI，DAI，I²C，SPI，SPORT，UART/USART
時(shí)鐘速率： 400MHz
非易失內(nèi)存： 外部
芯片上RAM： 5Mb
電壓 - 輸入/輸出： 3.30V
電壓 - 核心： 1.10V
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 176-LQFP 裸露焊盤
供應(yīng)商設(shè)備封裝： 176-LQFP-EP（24x24）
包裝： 托盤
Rev. B
|
Page 3 of 68
|
March 2013
GENERAL DESCRIPTION
The ADSP-2148x SHARC
processors are members of the
SIMD SHARC family of DSPs that feature Analog Devices’
Super Harvard Architecture. The processors are source code
compatible with the ADSP-2126x, ADSP-2136x, ADSP-2137x,
ADSP-2146x, ADSP-2147x and ADSP-2116x DSPs, as well as
with first generation ADSP-2106x SHARC processors in SISD
(single-instruction, single-data) mode. The ADSP-2148x pro-
cessors are 32-bit/40-bit floating point processors optimized for
high performance audio applications with large on-chip SRAM,
multiple internal buses to eliminate I/O bottlenecks, and an
innovative digital applications interface (DAI).
Table 1 shows performance benchmarks for the ADSP-2148x
processors. Table 2 shows the features of the individual product
offerings.
Table 1. Processor Benchmarks
Benchmark Algorithm
Speed
(at 400 MHz)
Speed
(at 450 MHz)
1024 Point Complex FFT
(Radix 4, with Reversal)
23 μs
20.44 μs
FIR Filter (per Tap)1
1.25 ns
1.1 ns
IIR Filter (per Biquad)1
5 ns
4.43 ns
Matrix Multiply (Pipelined)
[3 × 3] × [3 × 1]
[4 × 4] × [4 × 1]
11.25 ns
20 ns
10.0 ns
17.78 ns
Divide (y/×)
7.5 ns
6.67 ns
Inverse Square Root
11.25 ns
10.0 ns
1 Assumes two files in multichannel SIMD mode
Table 2. ADSP-2148x Family Features
Feature
ADSP-21483
ADSP-21486
ADSP-21487
ADSP-21488
ADSP-21489
Maximum Instruction Rate
400 MHz
450 MHz
400 MHz
450 MHz
RAM
3 Mbits
5 Mbits
3 Mbits
5 Mbits
ROM
4 Mbits
No
Audio Decoders in ROM1
Yes
No
Pulse-Width Modulation
4 Units (3 Units on 100-Lead Packages)
DTCP Hardware Accelerator
Contact Analog Devices
External Port Interface (SDRAM, AMI)2
Yes (16-bit)
AMI Only
Yes (16-bit)
Serial Ports
8
Direct DMA from SPORTs to External Port
(External Memory)
Yes
FIR, IIR, FFT Accelerator
Yes
Watchdog Timer
Yes (176-Lead Package Only)
MediaLB Interface
Automotive Models Only
IDP/PDAP
Yes
UART
1
DAI (SRU)/DPI (SRU2)
Yes
S/PDIF Transceiver
Yes
SPI
Yes
TWI
1
SRC Performance3
–128 dB
Thermal Diode
Yes
VISA Support
Yes
Package2
176-Lead LQFP EPAD
100-Lead LQFP EPAD
176-Lead LQFP
EPAD
176-Lead LQFP EPAD
100-Lead LQFP EPAD
1 ROM is factory programmed with latest multichannel audio decoding and post-processing algorithms from Dolby Labs and DTS. Decoder/post-processor algorithm
2 The 100-lead packages do not contain an external port. The SDRAM controller pins must be disabled when using this package. For more information, see Pin Function
Descriptions on Page 14. The ADSP-21486 processor in the 176-lead package also does not contain a SDRAM controller. For more information, see 176-Lead LQFP_EP
3 Some models have –140 dB performance. For more information, see Ordering Guide on page 66.
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