參數(shù)資料
型號： ADSP-21489KSWZ-4B
廠商： Analog Devices Inc
文件頁數(shù)： 52/68頁
文件大?。?/td> 0K
描述： IC CCD SIGNAL PROCESSOR 176LQFP
標準包裝： 1
系列： SHARC®
類型： 浮點
接口： EBI/EMI，DAI，I²C，SPI，SPORT，UART/USART
時鐘速率： 400MHz
非易失內(nèi)存： 外部
芯片上RAM： 5Mb
電壓 - 輸入/輸出： 3.30V
電壓 - 核心： 1.10V
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 176-LQFP 裸露焊盤
供應商設(shè)備封裝： 176-LQFP-EP（24x24）
包裝： 托盤
Rev. B
|
Page 56 of 68
|
March 2013
THERMAL CHARACTERISTICS
The ADSP-2148x processor is rated for performance over the
temperature range specified in Operating Conditions on
Table 57 airflow measurements comply with JEDEC standards
JESD51-2 and JESD51-6, and the junction-to-board measure-
ment complies with JESD51-8. Test board design complies with
JEDEC standards JESD51-7 (LQFP_EP). The junction-to-case
measurement complies with MIL- STD-883. All measurements
use a 2S2P JEDEC test board.
To determine the junction temperature of the device while on
the application PCB, use:
where:
TJ = junction temperature °C
TCASE = case temperature (°C) measured at the top center of the
package
JT = junction-to-top (of package) characterization parameter
is the Typical value from Table 57.
PD = power dissipation
Values of JA are provided for package comparison and PCB
design considerations. JA can be used for a first order approxi-
mation of TJ by the equation:
where:
TA = ambient temperature °C
Values of JC are provided for package comparison and PCB
design considerations when an external heatsink is required.
Figure 45. Typical Output Rise/Fall Time
(20% to 80%, VDD_EXT = Min)
Figure 46. Typical Output Rise/Fall Delay
(VDD_EXT = Max)
LOAD CAPACITANCE (pF)
6
0
10
4
2
RISE
AND
FALL
TIMES
(ns)
25
200
150
50
75
100
125
175
y = 0.0571x + 0.5558
y = 0.0278x + 0.3138
y = 0.0258x + 0.3684
TYPE A DRIVE FALL
TYPE A DRIVE RISE
TYPE B DRIVE RISE
TYPE B DRIVE FALL
8
12
14
y = 0.0747x + 0.5154
LOAD CAPACITANCE (pF)
3
0
3.5
2
1
0.5
1.5
RISE
AND
FALL
DELAY
(ns)
2.5
y = 0.0152x + 1.7607
y = 0.0068x + 1.7614
y = 0.0196x + 1.2945
y = 0.0074x + 1.421
0
25
200
150
50
75
100
125
175
TYPE A DRIVE FALL
TYPE A DRIVE RISE
TYPE B DRIVE RISE
TYPE B DRIVE FALL
4
4.5
Figure 47. Typical Output Rise/Fall Delay
(VDD_EXT = Min)
LOAD CAPACITANCE (pF)
6
0
7
4
2
1
3
RISE
AND
FALL
TIMES
DELAY
(ns)
125
200
100
25
175
50
75
150
5
y = 0.0256x + 3.5859
y = 0.0116x + 3.5697
8
y = 0.0359x + 2.924
9
y = 0.0136x + 3.1135
TYPE A DRIVE FALL
TYPE A DRIVE RISE
TYPE B DRIVE FALL
TYPE B DRIVE RISE
T
J
T
CASE
JT
P
D
+
=
T
J
T
A
JA
P
D
+
=
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