參數(shù)資料
型號(hào): EVAL-ADAU1781Z
廠商: Analog Devices Inc
文件頁數(shù): 62/92頁
文件大小: 0K
描述: BOARD EVAL FOR ADAU1781
標(biāo)準(zhǔn)包裝: 1
系列: SigmaDSP®
主要目的: 音頻編解碼器
嵌入式: 是,DSP
已用 IC / 零件: ADAU1781
主要屬性: 立體聲,24 位,8 ~ 96 kHz 采樣率,GUI 工具
次要屬性: *
已供物品: *
ADAU1781
Rev. B| Page 65 of 92
Register 16408 (0x4018), Converter Control 1
Bits[1:0], On-Chip ADC Data Selection in TDM Mode
These bits set the position of the ADC output channels on a TDM
stream. In TDM 4 mode, valid settings are first pair or second
pair. In TDM 8 mode, valid settings are first pair, second pair,
third pair, or fourth pair. These bits should be set in conjunction
with Register 16406 (0x4016), Serial Port Control 1, Bit 4, ADC
channel position in TDM, to select where the data should appear
in the TDM stream.
Figure 70, Figure 71, and Figure 72 show examples of different
TDM settings.
Table 49. Converter Control 1 Register
Bits
Description
Default
[7:2]
Reserved
[1:0]
On-chip ADC data selection in TDM mode
00
00: first pair
01: second pair
10: third pair
11: fourth pair
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