參數(shù)資料
型號(hào): EVAL-ADAU1781Z
廠商: Analog Devices Inc
文件頁(yè)數(shù): 86/92頁(yè)
文件大?。?/td> 0K
描述: BOARD EVAL FOR ADAU1781
標(biāo)準(zhǔn)包裝: 1
系列: SigmaDSP®
主要目的: 音頻編解碼器
嵌入式: 是,DSP
已用 IC / 零件: ADAU1781
主要屬性: 立體聲,24 位,8 ~ 96 kHz 采樣率,GUI 工具
次要屬性: *
已供物品: *
ADAU1781
Rev. B| Page 87 of 92
Register 16627 (0x40F3), Serial Output Route Control
Bits[3:0], Output Routing
These bits select where the ADC outputs are routed in the serial data stream (see Figure 74).
Table 79. Serial Output Route Control Register
Bits
Description
Default
[7:4]
Reserved
[3:0]
Output routing
0000
0000: ADCs to SigmaDSP core to serial outputs
0001: ADCs [L, R] to serial output [L0, R0]1
0010: reserved
0011: ADCs [L, R] to serial output [L1, R1]1
0100: reserved
0101: ADCs [L, R] to serial output [L2, R2]1
0110: reserved
0111: ADCs [L, R] to serial output [L3, R3]1
1000: reserved
1001: ADCs [L, R] to serial output [R0, L0]1
1010: reserved
1011: ADCs [L, R] to serial output [R1, L1]1
1100: reserved
1101: ADCs [L, R] to serial output [R2, L2]1
1110: reserved
1111: ADCs [L, R] to serial output [R3, L3]1
1 Lx = left side of Channel x; Rx = right side of Channel x.
1/
fLRCLK
LRCLK
STEREO CHANNELS
L0
R0
TDM 4 CHANNELS
L0
R0
L1
R1
TDM 8 CHANNELS
L0
R0
L1
R1
L2
R2
L3
R3
08314-
070
Figure 74. Serial Port Routing Control
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