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| 型號(hào)： | GS4576S09L-25 |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | DRAM |
| 英文描述： | DDR DRAM, PBGA144 |
| 封裝： | UBGA-144 |
| 文件頁(yè)數(shù)： | 27/64頁(yè) |
| 文件大?。?/td> | 2691K |
| 代理商： | GS4576S09L-25 |
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Preliminary
GS4576S09/18L
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.01 4/2011
33/64
2011, GSI Technology
Mode Register Definition in Multiplexed Address Mode
M2
M1
M0
Configuration
00
0
12 (default)
00
1
12
01
0
2
01
1
3
10
0
42
10
1
5
1
0
Reserved
1
Reserved
M4
M3
Burst
Length
0
2 (default)
01
4
10
8
11
Reserved
M5
Address MUX
0
Nonmulitplexed (default)
1
Multiplexed
M7
DLL Reset
0
DLL reset4 (default)
1
DLL enabled
M9
On Die
Termination
0
Off (default)
1On
M8
Drive Impedance
0
Internal 50
Ω3 (default)
1
External (ZQ)
A18...A10
A9
A8
A4
A3
18–10
9
8
7
6
5
4
3
2
1
0
Reserved1
ODT IM DLL NA5 AM
BL
Config
Mode Register (Mx)
A18...A10
A9
A8
A5
A4
A3
A0
Ay
Ax
Notes:
1. A10–A18 must be set to zero.
2. BL = 8 is not available.
3. +/–30% over rated temperature range.
4. DLL RESET turns the DLL off.
5. Ay8 not used in MRS.
6. BA0–BA2 are “Don’t Care”.
7. Addresses A0, A3, A4, A5, A8, and A9 must be set as shown in order to activate the Mode Register in the Multiplexed Address mode.
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