參數(shù)資料
型號: GS4576S09L-25
廠商: GSI TECHNOLOGY
元件分類: DRAM
英文描述: DDR DRAM, PBGA144
封裝: UBGA-144
文件頁數(shù): 63/64頁
文件大?。?/td> 2691K
代理商: GS4576S09L-25
Preliminary
GS4576S09/18L
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.01 4/2011
8/64
2011, GSI Technology
Power–Up Initialization Sequence
200us Min
Mode Initialization
tMRSC
Refresh
1024 Cycles NOP Cycles Min
NOP
MRS
NOP
AREF
NOP
AC
CODE(1,2)
CODE(2)
ADDR
Bank 0
Bank 7
Valid
tDKL
tDK
tDKL
tDKH
tDK
tCK
tCKL
tCKH
tCK
VEXT
VDD
VDDQ
VREF
VTT
CK
DK
Command
ADDR
BA
DM
D
All Banks(5)
Notes:
1.
Recommend all address pins held Low during dummy MRS commands.
2.
A10–A17 must be Low.
3.
DLL must be reset if tCK or VDD are changed.
4.
CK and CK must be separated at all times to prevent bogus commands from being issued.
5.
The sequence of the eight AUTO REFRESH commands (with respect to the 1024 NOP commands) does not matter. As is required for any operation,
tRC must be met between an AUTO REFRESH command and a subsequent VALID command to the same bank.
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