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參數(shù)資料
| 型號(hào)： | HY5R288HC |
| 英文描述： | -|2.5V|8K|40|Direct RDRAM - 288M |
| 中文描述： | - |為2.5V | 8K的| 40 |直接RDRAM的- 288M |
| 文件頁(yè)數(shù)： | 59/64頁(yè) |
| 文件大?。?/td> | 4542K |
| 代理商： | HY5R288HC |
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Rev.0.9 / Dec.2000
59
Direct RDRAM
256/288-Mbit (512Kx16/18x32s) Preliminary
Absolute Maximum Ratings
I
DD
- Current Profile
Table 22: Absolute Maximum Ratings
Symbol
Parameter
Min
Max
Unit
V
I,ABS
Voltage applied to any RSL or CMOS pin with respect to Gnd
- 0.3
V
DD
+0.3
V
V
DD,ABS
, V
DDA,ABS
Voltage on VDD and VDDA with respect to Gnd
- 0.5
V
DD
+1.0
V
T
STORE
Storage temperature
- 50
100
°
C
Table 23: Current Profile
a
I
DD
value
RDRAM Power state and Steady-State Transaction Rates
b
Min
Max@
t
=3.33ns
Max@
t
=2.81ns
Max@
t
=2.50ns
Unit
I
DD,PDN
Device in PDN, Self-refresh enabled and INIT.LSR=0
-
6000
6000
6000
μ
A
I
DD,NAP
Device in NAP.
-
4.2
4.2
4.2
mA
I
DD,STBY
Device in STBY. This is the average for a device in STBY with (1) no packets on
the Channel, and (2) with packets sent to other devices.
-
110
120
130
mA
I
DD,REFRESH
DEvice in STBY, and refreshing rows at the t
REF,MAX
period.
-
120
130
140
mA
I
DD,ATTN
Device in ATTN. This is the average for a device in ATTN with (1) no packets on
the Channel, and (2) with packets sent to other devices.
180
190
200
mA
I
DD,ATTN-W
Device in ATTN. ACT command every 8*t
CYCLE
, PRE command every 8*t
CYCLE
,
WR command every 4 * tCYCLE, and data is 1100..1100
-
600
700
750
mA
I
DD,ATTN-R
Device in ATTN. ACT command every 8*t
CYCLE
, PRE command every 8*t
CYCLE
,
RD command every 4 * tCYCLE, and data is 1111..1111
c
-
550
650
700
mA
a. The numbers in this table are not fixed yet.
b. CMOS interface consumes no power in all power states.
c. This does not include tje I
OL
sink current. The RDRAM dissipates I
OL
* V
OL
in each output driver when a logic one is driven.
Table 24: Supply current at Initialization
a
Symbol
Parameter
Allowed Range of TCYCLE
VDD
Min
Max
Unit
I
DD,PWRUP,D
I
DD
from power-on to SETR
3.33ns to 3.83ns
2.50ns to 3.32ns
V
DD,MIN
-
20
b
26
a
mA
I
DD,SETR,D
I
DD
from SETR to CLRR
3.33ns to 3.83ns
2.50ns to 3.32ns
V
DD,MIN
-
250
a
332
a
mA
a. The numbers in this table are specifications.
b. The supply current will be 150mA when t
CYCLE
is in the range 15ns to 1000ns.
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