參數(shù)資料
型號: IDT77V1254L25L25PGI
廠商: Integrated Device Technology, Inc.
英文描述: Quad Port PHY (Physical Layer) for 25.6 and 51.2 ATM Networks
中文描述: 四端口PHY(實體層)為25.6和51.2 ATM網(wǎng)絡(luò)
文件頁數(shù): 11/47頁
文件大小: 840K
代理商: IDT77V1254L25L25PGI
11 of 47
September 21, 2001
IDT77V1254L25
Note:
1.This output signal is unused in this mode. It must be left unconnected.
2.This input signal is unused in this mode. It must be connected to either logic high or logic low.
GND
111
AGND
112
AVDD
113
RX3-
114
RX3+
115
AVDD
116
AGND
117
AGND
118
AVDD
119
RX2-
120
RX2+
121
AVDD
122
AGND
123
AGND
124
AVDD
125
OSC
126
AGND
127
AVDD
128
AGND
129
AGND
130
AVDD
131
RX1-
132
RX1+
133
AVDD
134
AGND
135
AGND
136
AVDD
137
RX0-
138
RX0+
139
AVDD
140
AGND
141
GND
142
TX1-
143
TX1+
144
SIGNAL NAME
PIN NUMBER
16-BIT UTOPIA 2
MODE[1,0] = 00
8-BIT UTOPIA 1
MODE[1,0] = 01
DPI
MODE[1,0] = 10
Table 2 Signal Assignment as a Function of PHY/ATM Interface Mode (Part 4 of 4)
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