參數(shù)資料
型號： IDT77V1254L25L25PGI
廠商： Integrated Device Technology, Inc.
英文描述： Quad Port PHY (Physical Layer) for 25.6 and 51.2 ATM Networks
中文描述： 四端口PHY（實體層）為25.6和51.2 ATM網(wǎng)絡
文件頁數(shù)： 33/47頁
文件大?。?/td> 840K
代理商： IDT77V1254L25L25PGI
33 of 47
September 21, 2001
IDT77V1254L25
Status and Control Register List
The 77V1254L25 has 37 registers that are accessible through the utility bus. Each of the four ports has 9 registers dedicated to that port. There is
only one register (0x40) which is not port specific.
For those register bits which control operation of the Utopia interface, the operation of the Utopia interface is determined by the registers corre-
sponding to the port which is selected at that particular time. For consistent operation, the Utopia control bits should be programmed the same for all
four ports, except for the Utopia 2 port addresses in the Enhanced Control Registers.
Nomenclature
"Reserved" register bits, if written, should always be written "0"
R-only or W-only = register is read-only or write-only
“0” = ‘cleared’ or ‘not set’
R/W = register may be read and written via the utility bus
sticky = register bit is cleared after the register containing it is read; all sticky bits are read-only
“1” = ‘set’
C1
470pF
±20%
C2
470pF
±20%
L1
3.3
μ
H
±20%
Magnetics Modules for 25.6 Mbps
Pulse PE-67583 or R4005
www.pulseeng.com
TDK TLA-6M103
www.component.tdk.com
Magnetics Module for 51.2 Mbps
Pulse R4005
www.pulseeng.com
Table 5 Magnetics Modules
Register Name
Register Address
Port 0
Port 1
Port 2
Port 3
All Ports
Master Control Registers
0x00
0x10
0x20
0x30
Interrupt Status Registers
0x01
0x11
0x21
0x31
Diagnostic Control Registers
0x02
0x12
0x22
0x32
LED Driver and HEC Status/control
0x03
0x13
0x23
0x33
Low Byte Counter Register [7:0]
0x04
0x14
0x24
0x34
High Byte Counter Register [15:8]
0x05
0x15
0x25
0x35
Counter Registers Read Select
0x06
0x16
0x26
0x36
Interrupt Mask Registers
0x07
0x17
0x27
0x37
Enhanced Control 1 Registers
0x08
0x18
0x28
0x38
RXREF and TXREF Control Register
0x40
Component
Value
Tolerance
Table 4 Analog Component Values (Part 2 of 2)
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