參數(shù)資料
型號(hào)： IDT88P8344BHGI
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 微控制器/微處理器
英文描述： SPI EXCHANGE 4 x SPI-3 TO SPI-4 Issue 1.0
中文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PBGA820
封裝： GREEN, PLASTIC, BGA-820
文件頁(yè)數(shù)： 23/98頁(yè)
文件大小： 601K
代理商： IDT88P8344BHGI
23
IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4
INDUSTRIAL TEMPERATURE RANGE
APRIL 10, 2006
4. DATAPATH AND FLOW CONTROL
The following sections describe the datapaths through the device. The
datapaths shown are as follows:
- SPI-3A <-> SPI-4
- SPI-3B <-> SPI-4
- SPI-3C <-> SPI-4
- SPI-3D <-> SPI-4
- SPI-3A <-> SPI-3B
- SPI-3C <-> SPI-3D
- SPI-3A <-> mcroprocessor interface
- SPI-3B <-> mcroprocessor interface
- SPI-3C <-> mcroprocessor interface
- SPI-3D <-> mcroprocessor interface
- SPI-4 <-> mcroprocessor interface
Where <-> indicates a bidirectional data path.
The IDT88P8344 supports four SPI-3 interfaces and a single SPI-4 interface.
All SPI-3 interfaces can operate independently in a PHY or Link mode. Refer
to Figure 11,
Definition of Data Flows
for the main data flows in the device.
Independent logical data flows are transported over each of the physical ports.
Those logical flows are identified by logical port addresses on the physical port
and by a Link identification (LID) map in the core of the IDT88P8344.
DATA BUFFER ALLOCATION
Flexibility has been provided to the user for data buffer allocation. The device
has 128 KByte of on chip memory per SPI-3 port per direction – a total of 1MByte
of on-chip data memory.
The 128 KByte SPI-3 buffers (8 instantiations per device) are divided into
256 byte segments. The segments are controlled by a packet fragment
processor. The user configures the maximumnumber of segments per LP to
allocate to a port and the number of segments allocated fromthe buffer segment
pool that will trigger the flow control mechanism There is no limtation on the
reallocation of freed segments among logical ports, as would be present if the
memory had been allocated by a simple address mechanism
Figure 11. Definition of data flows
6370 drwXA
SPI-3A physical port
SPI-4
to SPI-3
from SPI-3
to SPI-4
from SPI-4
SPI-3 egress
SPI-3 ingress
SPI-4 ingress
SPI-4 egress
SPI-3-4 path
SPI-4-3 path
physical
port
SPI-3B physical port
SPI-3C physical port
SPI-3D physical po
r
t
SPI-3 extract
SPI-3 insert
SPI-4 insert
SPI-4 extract
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