Timers (Timer A)
109
Mitsubishi microcomputers
M16C / 62P Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
development
Preliminary Specifications Rev.1.0
Specifications in this manual are tentative and subject to change.
Timer A
Figure 1.14.3 shows a block diagram of the timer A. Figures 1.14.4 to 1.14.6 show registers related to the
timer A.
The timer A supports the following four modes. Except in event counter mode, timers A0 to A4 all have the
same function. Use the TMOD1 to TMOD0 bits of TAiMR register (i = 0 to 4) to select the desired mode.
Timer mode: The timer counts an internal count source.
Event counter mode: The timer counts pulses from an external device or overflows and underflows of
other timers.
One-shot timer mode: The timer outputs a pulse only once before it reaches the minimum count
“0000
16
.”
Pulse width modulation (PWM) mode: The timer outputs pulses in a given width successively.
Figure 1.14.4. TA0MR to TA4MR Registers
TABSR register
Up-count/down-count
TAi
Addresses
0387
16
0389
16
038B
16
038D
16
TAj
TAk
Timer A0
Timer A1
Timer A2
Timer A3
Timer A4 038F
16
0386
16
0388
16
038A
16
038C
16
038E
16
Timer A4
Timer A0
Timer A1
Timer A2
Timer A3
Timer A1
Timer A2
Timer A3
Timer A4
Timer A0
Always counts down except
in event counter mode
Reload register
Counter
Low-order
8 bits
AAAA
A
High-order
8 bits
Clock source
selection
Timer
(gate function)
Timer
One shot
PWM
f
1
or f
2
f
8
f
32
f
C32
TAi
IN
(i = 0 to 4)
TB2 overflow
Event counter
Clock selection
TAj overflow
(j = i – 1. Note, however, that j = 4 when i = 0)
Pulse output
Toggle flip-flop
TAi
OUT
(i = 0 to 4)
Data bus low-order bits
Data bus high-order bits
A
UDF register
Down count
TAk overflow
(k = i + 1. Note, however, that k = 0 when i = 4)
Polarity
selection
To external
trigger circuit
(Note)
(Note)
Note: Overflow or underflow
Clock selection
Timer Ai mode register (i=0 to 4)
Symbol
Address
After reset
00
16
TA0MR to TA4MR
0396
16
to 039A
16
Bit name
Function
Bit symbol
TMOD0
RW
b7
b6
b5
b4
b3
b2
b1
b0
0 1 : Event counter mode
1 0 : One-shot timer mode
1 1 : Pulse width modulation
(PWM) mode
b1 b0
TCK1
MR3
MR2
MR1
TMOD1
MR0
TCK0
Function varies with each
operation mode
Count source select bit
Operation mode select bit
RW
RW
RW
RW
RW
RW
RW
RW
Function varies with each
operation mode
Figure 1.14.3. Timer A Block Diagram