Timers (Timer B)
126
Mitsubishi microcomputers
M16C / 62P Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
development
Preliminary Specifications Rev.1.0
Specifications in this manual are tentative and subject to change.
Item
Specification
Count source
External signals input to TBi
IN
pin (i=0 to 5) (effective edge can be selected
in program)
Timer Bj overflow or underflow (j=i-1, except j=2 if i=0, j=5 if i=3)
Down-count
When the timer underflows, it reloads the reload register contents and
continues counting
1/(n+1)
n: set value of TBi register 0000
16
to FFFF
16
Set TBiS bit
1
to “1” (= start counting)
Set TBiS bit to “0” (= stop counting)
Interrupt request generation timing
Timer underflow
TBi
IN
pin function
Count source input
Read from timer
Count value can be read by reading TBi register
Write to timer
When not counting and until the 1st count source is input after counting start
Value written to TBi register is written to both reload register and counter
When counting (after 1st count source input)
Value written to TBi register is written to only reload register
(Transferred to counter when reloaded next)
Notes:
1. The TB0S to TB2S bits are assigned to the TABSR register bit 5 to bit 7, and the TB3S to TB5S bits
are assigned to the TBSR register bit 5 to bit 7.
Count operation
Divide ratio
Count start condition
Count stop condition
2. Event Counter Mode
In event counter mode, the timer counts pulses from an external device or overflows and underflows of
other timers (see Table 1.15.2) . Figure 1.15.5 shows TBiMR register in event counter mode.
Table 1.15.2. Specifications in Event Counter Mode
Figure 1.15.5. TBiMR Register in Event Counter Mode
Timer Bi mode register (i=0 to 5)
AA
Symbol
Address
After reset
00XX0000
2
00XX0000
2
TB0MR to TB2MR
TB3MR to TB5MR
039B
16
to 039D
16
035B
16
to 035D
16
Bit name
Function
Bit symbol
TMOD0
RW
RW
b7
b6
b2
b1
0 1
b0
Operation mode select bit
0 1 : Event counter mode
b1 b0
TMOD1
MR0
Count polarity select
bit
(Note 1)
MR2
MR1
MR3
TCK1
TCK0
0 0 : Counts external signal's
falling edges
0 1 : Counts external signal's
rising edges
1 0 : Counts external signal's
falling and rising edges
1 1 : Must not be set
b3 b2
Note 1: Effective when the TCK1 bit = “0” (input from TBiIN pin). If the TCK1 bit = “1” (TBj overflow or underflow), these
bits can be set to “0” or “1”.
Note 2: The port direction bit for the TBi
IN
pin must be set to “0” (= input mode).
Has no effect in event counter mode.
Can be set to “0” or “1”.
Event clock select
0 : Input from TBi
IN
pin (Note 2)
1 : TBj overflow or underflow
(j = i – 1, except j = 2 if i = 0,
j = 5 if i = 3)
RW
RW
RW
RW
RW
RW
RO
TB0MR, TB3MR registers
Must be set to “0” in timer mode
TB1MR, TB2MR, TB4MR, TB5MR registers
Nothing is assigned. When write, set to “0”. When read, its
content is indeterminate.
When write in event counter mode, set to “0”. When read in event
counter mode, its content is indeterminate.