Mitsubishi microcomputers
M16C / 62P Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
A-D Converter
192
development
Preliminary Specifications Rev.1.0
Specifications in this manual are tentative and subject to change.
A-D control register 2 (Note 1)
Symbol
ADCON2
Address
03D4
16
After reset
00
16
b7
b6
b5
b4
b3
0
b2
b1
b0
A-D conversion method
select bit
0 : Without sample and hold
1 : With sample and hold
Bit symbol
Bit name
Function
RW
SMP
Reserved bit
Must always be set to
“0”
Note 1: If the ADCON2 register is rewritten during A-D conversion, the conversion result will be indeterminate.
Note 2: If V
CC2
< V
CC1
, do not use AN
00
to AN
07
and AN
20
to AN
27
as analog input pins.
Note 3: The
AD
frequency must be 10 MHz or less. The selected
AD
frequency is determined by a combination of
the ADCON0 register's CKS0 bit, ADCON1 register's CKS1 bit, and ADCON2 register's CKS2 bit.
A-D input group select bit
0 1 : Must not be set
1 0 : Port P0 group is selected (Note 3)
1 1 : Port P2 group is selected
b2 b1
Frequency select bit 2
(Note 3)
CKS2
ADGSEL0
ADGSEL1
RW
RW
RW
RW
RW
A-D register i (i=0 to 7)
Symbol
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
Address
After reset
03C1
16
to 03C0
16
Indeterminate
03C3
16
to 03C2
16
Indeterminate
03C5
16
to 03C4
16
Indeterminate
03C7
16
to 03C6
16
Indeterminate
03C9
16
to 03C8
16
Indeterminate
03CB
16
to 03CA
16
Indeterminate
03CD
16
to 03CC
16
Indeterminate
03CF
16
to 03CE
16
Indeterminate
Eight low-order bits of
A-D conversion result
Function
(b15)
b7
b7
b0
b0
(b8)
When the ADCON1 register's
BITS bit is “1” (10-bit mode)
Nothing is assigned.
In an attempt to write to these bits, write “0”. The value, if
read, turns out to be “0”.
When read, the content is
indeterminate
RW
RO
RO
(b3)
Nothing is assigned. In an attempt to write to these bits, write “0”.
The value, if read, turns out to be “0”.
(b7-b5)
0: Selects f
AD
, f
AD
divided by 2, or f
AD
divided by 4.
1: Selects f
AD
divided by 3, f
AD
divided
by 6, or f
AD
divided by 12.
CKS0
CKS1
CKS2
AD
0
0
0
0
0
0
1
1
0
1
0
0
1
0
1
1
1
0
1
1
1
Divide-by-4 of f
AD
Divide-by-2 of f
AD
f
AD
Ddivide-by-12 of f
AD
0
1
1
Divide-by-6 of f
AD
Divide-by-3 of f
AD
Two high-order bits of
A-D conversion result
When the ADCON1 register's
BITS bit is “0” (8-bit mode)
A-D conversion result
Figure 1.22.3. ADCON2 Register, and AD0 to AD7 Registers