Mitsubishi microcomputers
M16C / 62P Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Reset
24
development
Preliminary Specifications Rev.1.0
Specifications in this manual are tentative and subject to change.
Voltage Detection Circuit
The voltage detection circuit has circuits to monitor the input voltage at the V
CC1
pin, each checking the
input voltage with respect to Vdet2, Vdet3, and Vdet4, respectively. Use the VC25 to VC27 bits in the VCR2
register to select whether or not to enable these circuits.
Enable the RAM retention limit detection circuit when using hardware reset 2 in stop mode, or when using
the WDC5 bit in the WDC register. The WDC5 bit indicates that the RAM is retained.
Use the reset level detection circuit for hardware reset 2.
The power supply down detection circuit can be set to detect whether the input voltage is equal to or greater
than Vdet4 or less than Vdet4 by using the VC13 bit in the VCR1 register. Furthermore, a power supply
down detection interrupt can be used.
Figure 1.5.4. Reset Circuit Block
b
7 b
6 b
5
V
C
R
2
r
e
g
i
s
t
e
r
R
E
S
E
T
CM10 bit=1
(stop mode)
+
≥
E
V
d
e
t
2
+
≥
Vdet3
E
+
≥
V
d
e
t
4
E
N
o
i
s
e
r
e
j
e
c
t
i
o
n
Power supply down
detection signal
b3
VCR1 register
VC13 bit
Internal power on reset
W
r
i
t
e
t
o
W
D
C
r
e
g
i
s
t
e
r
S
R
Q
W
A
R
M
/
C
O
L
D
>T
Q
1
s
h
o
t
t
d
(
S
-
R
)
Internal reset signal
(“L” active)
WDC5 bit
I
v
n
o
t
e
l
t
r
a
n
g
a
e
l
p
s
o
t
a
w
b
e
l
e
r
t
s
i
u
m
p
e
p
l
y
(Cold start, warm start)
V
C
C
1
T
D
Q
H
a
l
f
l
a
t
c
h
Figure 1.5.5. WDC Register
Watchdog timer control register
Symbol
WDC
Address
000F
16
After reset
00XXXXXX
2
(Note2)
Function
Bit symbol
RW
b7
b6
0
b5
b4
b3
b2
b1
b0
High-order bit of watchdog timer
WDC7
Bit name
Prescaler select bit
0 : Divided by 16
1 : Divided by 128
Reserved bit
Set to “0”
RO
RW
RW
RW
Cold start / warm start
discrimination flag (Note 1)
0 : Cold start
1 : Warm start
WDC5
Note 1: The WDC5 bit is always “1” (= warm start) no matter how it is set by writing a “0” or “1”.
Note 2: The WDC5 bit is “0” (= cold start) immediately after power-on. It can only be set to “1” in a program. It is
set to “0” when the input voltage at the V
CC1
pin drops to V
det
2
or less while the VCR2 register’s VC25
bit = 1 (RAM retention limit detection circuit enabled).
(b4-b0)
(b6)