
30
Mitsubishi microcomputers
M16C / 62P Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Processor Mode
development
Preliminary Specifications Rev.1.0
Specifications in this manual are tentative and subject to change.
Figure 1.6.1. PM0 Register
Processor mode register 0 (Note 1)
Symbol
PM0
Address
0004
16
After reset (Note 4)
00000000
2
(
CNV
SS
pin = “L”
)
00000011
2
(
CNV
SS
pin = “H”
)
Bit name
Function
Bit symbol
RW
b7
b6
b5
b4
b3
b2
b1
b0
0 0: Single-chip mode
0 1: Memory expansion mode
1 0: Must not be set
1 1: Microprocessor mode
b1 b0
PM03
PM01
PM00
Processor mode bit
(Note 4)
PM02
R/W mode select bit
(Note 2)
0 : RD,BHE,WR
1 : RD,WRH,WRL
Software reset bit
Setting this bit to “1” resets the
microcomputer. When read, its content
is “0”.
PM04
0 0 : Multiplexed bus is unused
(Separate bus in the entire CS
space)
0 1 : Allocated to CS2 space
1 0 : Allocated to CS1 space
1 1 : Allocated to the entire CS space
(Note 3)
b5 b4
Multiplexed bus space
select bit
(Note 2)
PM05
RW
RW
RW
RW
PM06
PM07
Port P4
0
to P4
3
function
select bit (Note 2)
0 : Address output
1 : Port function
(Address is not output)
0 : BCLK is output
1 : BCLK is not output
(Pin is left high-impedance)
BCLK output disable bit
Note 1: Write to this register after setting the PRC1 bit in the PRCR register to "1" (write enable).
Note 2: Effective when the PM01 to PM00 bits are set to “01
2
” (memory expansion mode) or “11
2
” (microprocessor
mode).
Note 3: To set the PM01 to PM00 bits are “01
2
” and the PM05 to PM04 bits are “11
2
” (multiplexed bus assigned to
the entire CS space), apply an “H” signal to the BYTE pin (external data bus is 8 bits wide). While the
CNV
SS
pin is held “H” (= V
CC1
), do not rewrite the PM05 to PM04 bits to “11
2
” after reset.
If the PM05 to PM04 bits are set to “11
2
” during memory expansion mode, P3
1
to P3
7
and P4
0
to P4
3
become I/O ports, in which case the accessible area for each CS is 256 bytes.
Note 4: The PM01 to PM00 bits do not change at software reset, watchdog timer reset and oscillation stop
detection reset.
RW
RW
RW
RW
(Note 2)