參數(shù)資料
型號: M68HC16Y1CFC
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, MICROCONTROLLER, PQFP16
封裝: QFP-160
文件頁數(shù): 106/138頁
文件大?。?/td> 784K
代理商: M68HC16Y1CFC
MC68HC16Y1
MOTOROLA
MC68HC16Y1TS/D
7
NOTES
1. DATA[15:0] are synchronized during reset only. MODCLK, MCCI and ADC pins are
synchronized only when used as input port pins.
2. EXTAL, XFC, and XTAL are clock reference connections.
3. PAI and PCLK can be used for discrete input, but are not part of an I/O port.
4. PWMA and PWMB can be used for discrete output, but are not part of an I/O port.
5. VRH and VRLare ADC reference voltage inputs.
1. Pins with this type of driver may only go into high-impedance state under certain conditions. The TSC signal
can put all pins with this type of driver in high-impedance state.
PWMA, PWMB4
A
Y
O
R/W
A
Y
N
RESET
Bo
Y
RXDA
Bo
Y
I/O
MC6
RXDB
Bo
Y
I/O
MC4
SCK
Bo
Y*
Y
I/O
MC2
SIZ[1:0]
B
Y
N
I/O
E[7:6]
TSC
Y
TPUCH[15:0]
A
Y
T2CLK
Y
TXDA
Bo
Y
I/O
MC7
TXDB
Bo
Y
I/O
MC5
VRH
5
VRL
5
XFC2
XTAL2
Table 3 MC68HC16Y1 Driver Types
Type
I/O
Description
A
O
Output-only signals that are always driven. No external pull-up required.
Aw
O
Type A output with weak P-channel pull-up during reset.
B1
O
Three-state output that includes circuitry to pull up output before high impedance is es-
tablished, to insure rapid rise time. An external holding resistor is required to
maintain logic level while in the high-impedance state.
Bo
O
Type B output that can be operated in an open-drain mode.
Table 4 MC68HC16Y1 Power Connections
VDDA/VSSA
A/D Converter Power
VDDSYN
Clock Synthesizer Power
VSSE/VDDE
External Peripheral Power (Source and Drain)
VSTBY
Standby RAM Power/Clock Synthesizer Power
Table 2 MC68HC16Y1 Pin Characteristics (Continued)
Pin
Mnemonic
Output
Driver
Input
Synchronized
Input
Hysteresis
Discrete
I/O
Port
Designation
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